[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PATCH 7/9] tcg/aarch64: Support INDEX_op_extract2_{i32, i6
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 7/9] tcg/aarch64: Support INDEX_op_extract2_{i32, i64} |
Date: |
Thu, 7 Mar 2019 06:41:24 -0800 |
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/aarch64/tcg-target.h | 4 ++--
tcg/aarch64/tcg-target.inc.c | 11 +++++++++++
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 6600a54a02..ce2bb1f90b 100644
--- a/tcg/aarch64/tcg-target.h
+++ b/tcg/aarch64/tcg-target.h
@@ -77,7 +77,7 @@ typedef enum {
#define TCG_TARGET_HAS_deposit_i32 1
#define TCG_TARGET_HAS_extract_i32 1
#define TCG_TARGET_HAS_sextract_i32 1
-#define TCG_TARGET_HAS_extract2_i32 0
+#define TCG_TARGET_HAS_extract2_i32 1
#define TCG_TARGET_HAS_movcond_i32 1
#define TCG_TARGET_HAS_add2_i32 1
#define TCG_TARGET_HAS_sub2_i32 1
@@ -114,7 +114,7 @@ typedef enum {
#define TCG_TARGET_HAS_deposit_i64 1
#define TCG_TARGET_HAS_extract_i64 1
#define TCG_TARGET_HAS_sextract_i64 1
-#define TCG_TARGET_HAS_extract2_i64 0
+#define TCG_TARGET_HAS_extract2_i64 1
#define TCG_TARGET_HAS_movcond_i64 1
#define TCG_TARGET_HAS_add2_i64 1
#define TCG_TARGET_HAS_sub2_i64 1
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index d57f9e500f..8b93598bce 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -2058,6 +2058,11 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
tcg_out_sbfm(s, ext, a0, a1, a2, a2 + args[3] - 1);
break;
+ case INDEX_op_extract2_i64:
+ case INDEX_op_extract2_i32:
+ tcg_out_extr(s, ext, a0, a1, a2, args[3]);
+ break;
+
case INDEX_op_add2_i32:
tcg_out_addsub2(s, TCG_TYPE_I32, a0, a1, REG0(2), REG0(3),
(int32_t)args[4], args[5], const_args[4],
@@ -2300,6 +2305,8 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode
op)
= { .args_ct_str = { "r", "r", "rAL" } };
static const TCGTargetOpDef dep
= { .args_ct_str = { "r", "0", "rZ" } };
+ static const TCGTargetOpDef ext2
+ = { .args_ct_str = { "r", "rZ", "rZ" } };
static const TCGTargetOpDef movc
= { .args_ct_str = { "r", "r", "rA", "rZ", "rZ" } };
static const TCGTargetOpDef add2
@@ -2430,6 +2437,10 @@ static const TCGTargetOpDef *tcg_target_op_def(TCGOpcode
op)
case INDEX_op_deposit_i64:
return &dep;
+ case INDEX_op_extract2_i32:
+ case INDEX_op_extract2_i64:
+ return &ext2;
+
case INDEX_op_add2_i32:
case INDEX_op_add2_i64:
case INDEX_op_sub2_i32:
--
2.17.2
- Re: [Qemu-devel] [PATCH 4/9] tcg: Use extract2 in tcg_gen_deposit_{i32, i64}, (continued)
- [Qemu-devel] [PATCH 2/9] tcg: Add INDEX_op_extract2_{i32,i64}, Richard Henderson, 2019/03/07
- [Qemu-devel] [PATCH 5/9] tcg/i386: Support INDEX_op_extract2_{i32, i64}, Richard Henderson, 2019/03/07
- [Qemu-devel] [PATCH 6/9] tcg/arm: Support INDEX_op_extract2_i32, Richard Henderson, 2019/03/07
- [Qemu-devel] [PATCH 7/9] tcg/aarch64: Support INDEX_op_extract2_{i32, i64},
Richard Henderson <=
- [Qemu-devel] [PATCH 9/9] target/arm: Simplify BFXIL expansion, Richard Henderson, 2019/03/07
- [Qemu-devel] [PATCH 8/9] target/arm: Use extract2 for EXTR, Richard Henderson, 2019/03/07
- Re: [Qemu-devel] [PATCH 0/9] tcg: Add tcg_gen_extract2_{i32,i64}, no-reply, 2019/03/07
- Re: [Qemu-devel] [PATCH 0/9] tcg: Add tcg_gen_extract2_{i32,i64}, no-reply, 2019/03/07
- Re: [Qemu-devel] [PATCH 0/9] tcg: Add tcg_gen_extract2_{i32,i64}, no-reply, 2019/03/08
- Re: [Qemu-devel] [PATCH 0/9] tcg: Add tcg_gen_extract2_{i32,i64}, no-reply, 2019/03/08
- Re: [Qemu-devel] [PATCH 0/9] tcg: Add tcg_gen_extract2_{i32,i64}, no-reply, 2019/03/08