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Re: [Qemu-devel] [PATCH v3 08/14] r2d: Fix flash memory size, sector siz
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [PATCH v3 08/14] r2d: Fix flash memory size, sector size, width, device ID |
Date: |
Thu, 7 Mar 2019 14:51:00 +0100 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.5.1 |
On 3/7/19 2:03 PM, Markus Armbruster wrote:
> pflash_cfi02_register() takes a size in bytes, a block size in bytes
> and a number of blocks. r2d_init() passes FLASH_SIZE, 16 * KiB,
> FLASH_SIZE >> 16. Does not compute: size doesn't match block size *
> number of blocks. The latter happens to win: FLASH_SIZE / 4,
> i.e. 8MiB.
>
> The best information we have on the physical hardware lists a Cypress
> S29PL127J60TFI130 128MiBit NOR flash addressable in words of 16 bits,
> in sectors of 4 and 32 Kibiwords. We don't model multiple sector
> sizes.
>
> Fix the flash size from 8 to 16MiB, and adjust the sector size from 16
> to 64KiB. Fix the width from 4 to 2. While there, supply the real
> device IDs 0x0001, 0x227e, 0x2220, 0x2200 instead of zeros.
>
> Cc: Magnus Damm <address@hidden>
> Signed-off-by: Markus Armbruster <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
> ---
> hw/sh4/r2d.c | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c
> index dcdb3728cb..cd23c60b86 100644
> --- a/hw/sh4/r2d.c
> +++ b/hw/sh4/r2d.c
> @@ -44,7 +44,7 @@
> #include "exec/address-spaces.h"
>
> #define FLASH_BASE 0x00000000
> -#define FLASH_SIZE 0x02000000
> +#define FLASH_SIZE (16 * MiB)
>
> #define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */
> #define SDRAM_SIZE 0x04000000
> @@ -288,12 +288,20 @@ static void r2d_init(MachineState *machine)
> sysbus_mmio_map(busdev, 1, 0x1400080c);
> mmio_ide_init_drives(dev, dinfo, NULL);
>
> - /* onboard flash memory */
> + /*
> + * Onboard flash memory
> + * According to the old board user document in Japanese (under
> + * NDA) what is referred to as FROM (Area0) is connected via a
> + * 32-bit bus and CS0 to CN8. The docs mention a Cypress
> + * S29PL127J60TFI130 chipsset. Per the 'S29PL-J 002-00615
> + * Rev. *E' datasheet, it is a 128Mbit NOR parallel flash
> + * addressable in words of 16bit.
> + */
> dinfo = drive_get(IF_PFLASH, 0, 0);
> pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
> dinfo ? blk_by_legacy_dinfo(dinfo) : NULL,
> - 16 * KiB, FLASH_SIZE >> 16,
> - 1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
> + 64 * KiB, FLASH_SIZE >> 16,
> + 1, 2, 0x0001, 0x227e, 0x2220, 0x2200,
> 0x555, 0x2aa, 0);
>
> /* NIC: rtl8139 on-board, and 2 slots. */
>
[Qemu-devel] [PATCH v3 08/14] r2d: Fix flash memory size, sector size, width, device ID, Markus Armbruster, 2019/03/07
- Re: [Qemu-devel] [PATCH v3 08/14] r2d: Fix flash memory size, sector size, width, device ID,
Philippe Mathieu-Daudé <=
[Qemu-devel] [PATCH v3 11/14] hw/mips/malta: Restrict 'bios_size' variable scope, Markus Armbruster, 2019/03/07
[Qemu-devel] [PATCH v3 03/14] pflash_cfi01: Log use of flawed "write to buffer", Markus Armbruster, 2019/03/07
[Qemu-devel] [PATCH v3 05/14] hw: Use PFLASH_CFI0{1, 2} and TYPE_PFLASH_CFI0{1, 2}, Markus Armbruster, 2019/03/07
Re: [Qemu-devel] [PATCH v3 00/14] pflash: Fixes and cleanups, no-reply, 2019/03/09