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Re: [Qemu-devel] [PATCH v4 3/8] target/arm: Rearrange Floating-point dat
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From: |
Peter Maydell |
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Subject: |
Re: [Qemu-devel] [PATCH v4 3/8] target/arm: Rearrange Floating-point data-processing (2 regs) |
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Date: |
Tue, 19 Feb 2019 16:57:08 +0000 |
On Fri, 15 Feb 2019 at 19:23, Richard Henderson
<address@hidden> wrote:
>
> There are lots of special cases within these insns. Split the
> major argument decode/loading/saving into no_output (compares),
> rd_is_dp, and rm_is_dp.
>
> We still need to special case argument load for compare (rd as
> input, rm as zero) and vcvt fixed (rd as input+output), but lots
> of special cases do disappear.
>
> Now that we have a full switch at the beginning, hoist the ISA
> checks from the code generation.
>
> Signed-off-by: Richard Henderson <address@hidden>
> ---
Reviewed-by: Peter Maydell <address@hidden>
thanks
-- PMM
- [Qemu-devel] [PATCH v4 0/8] target/arm: Implement ARMv8.3-JSConv & ARMv8.2-FHM, Richard Henderson, 2019/02/15
- [Qemu-devel] [PATCH v4 1/8] target/arm: Restructure disas_fp_int_conv, Richard Henderson, 2019/02/15
- [Qemu-devel] [PATCH v4 3/8] target/arm: Rearrange Floating-point data-processing (2 regs), Richard Henderson, 2019/02/15
- Re: [Qemu-devel] [PATCH v4 3/8] target/arm: Rearrange Floating-point data-processing (2 regs),
Peter Maydell <=
- [Qemu-devel] [PATCH v4 4/8] target/arm: Implement ARMv8.3-JSConv, Richard Henderson, 2019/02/15
- [Qemu-devel] [PATCH v4 5/8] target/arm: Add helpers for FMLAL, Richard Henderson, 2019/02/15
- [Qemu-devel] [PATCH v4 6/8] target/arm: Implement FMLAL and FMLSL for aarch64, Richard Henderson, 2019/02/15
- [Qemu-devel] [PATCH v4 7/8] target/arm: Implement VFMAL and VFMSL for aarch32, Richard Henderson, 2019/02/15
- [Qemu-devel] [PATCH v4 8/8] target/arm: Enable ARMv8.2-FHM for -cpu max, Richard Henderson, 2019/02/15
- [Qemu-devel] [PATCH v4 2/8] target/arm: Split out vfp_helper.c, Richard Henderson, 2019/02/15