Re: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree

[no-reply]

Patchew URL: https://patchew.org/QEMU/address@hidden/



Hi,

This series seems to have some coding style problems. See output below for
more information:

Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v7 00/35] target/riscv: Convert to decodetree
Type: series

=== TEST SCRIPT BEGIN ===
#!/bin/bash
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 t [tag update]            patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
3016b4d562 target/riscv: Remaining rvc insn reuse 32 bit translators
24b06d360e target/riscv: Splice remaining compressed insn pairs for riscv32 vs 
riscv64
c429dc0bcc target/riscv: Splice fsw_sd and flw_ld for riscv32 vs riscv64
4705800e73 target/riscv: Convert @cl_d, @cl_w, @cs_d, @cs_w insns
b608143200 target/riscv: Convert @cs_2 insns to share translation functions
4f2f49f7d5 target/riscv: Remove decode_RV32_64G()
bdfd19cc02 target/riscv: Remove gen_system()
2595093a33 target/riscv: Rename trans_arith to gen_arith
a6184222b0 target/riscv: Remove manual decoding of RV32/64M insn
398d027afa target/riscv: Remove shift and slt insn manual decoding
6170fd65a1 target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
acecc8ffa6 target/riscv: Move gen_arith_imm() decoding into trans_* functions
f02dc68f7e target/riscv: Remove manual decoding from gen_store()
99604155b9 target/riscv: Remove manual decoding from gen_load()
aa9bf2e767 target/riscv: Remove manual decoding from gen_branch()
2cfb58f450 target/riscv: Remove gen_jalr()
b771a0123b target/riscv: Convert quadrant 2 of RVXC insns to decodetree
79ff16294f target/riscv: Convert quadrant 1 of RVXC insns to decodetree
3d70d65273 target/riscv: Convert quadrant 0 of RVXC insns to decodetree
c2e190ac41 target/riscv: Convert RV priv insns to decodetree
4aeb2ac0bd target/riscv: Convert RV64D insns to decodetree
1f3be1fde1 target/riscv: Convert RV32D insns to decodetree
fabadb15d8 target/riscv: Convert RV64F insns to decodetree
ad79932d92 target/riscv: Convert RV32F insns to decodetree
7c60184c2f target/riscv: Convert RV64A insns to decodetree
f376c10a5d target/riscv: Convert RV32A insns to decodetree
f72535b75d target/riscv: Convert RVXM insns to decodetree
ac4c92da37 target/riscv: Convert RVXI csr insns to decodetree
b8b2f75bcd target/riscv: Convert RVXI fence insns to decodetree
889af58774 target/riscv: Convert RVXI arithmetic insns to decodetree
8783bc3ad7 target/riscv: Convert RV64I load/store insns to decodetree
f6e82e189c target/riscv: Convert RV32I load/store insns to decodetree
db3017b90c target/riscv: Convert RVXI branch insns to decodetree
cd9d7ded20 target/riscv: Activate decodetree and implemnt LUI & AUIPC
4e9eb0f722 target/riscv: Move CPURISCVState pointer to DisasContext

=== OUTPUT BEGIN ===
1/35 Checking commit 4e9eb0f722f6 (target/riscv: Move CPURISCVState pointer to 
DisasContext)
2/35 Checking commit cd9d7ded2086 (target/riscv: Activate decodetree and 
implemnt LUI & AUIPC)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#34: 
new file mode 100644

ERROR: externs should be avoided in .c files
#125: FILE: target/riscv/translate.c:1885:
+bool decode_insn32(DisasContext *ctx, uint32_t insn);

total: 1 errors, 1 warnings, 125 lines checked

Patch 2/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

3/35 Checking commit db3017b90c9e (target/riscv: Convert RVXI branch insns to 
decodetree)
4/35 Checking commit f6e82e189cc1 (target/riscv: Convert RV32I load/store insns 
to decodetree)
5/35 Checking commit 8783bc3ad755 (target/riscv: Convert RV64I load/store insns 
to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#39: 
new file mode 100644

total: 0 errors, 1 warnings, 76 lines checked

Patch 5/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
6/35 Checking commit 889af587745b (target/riscv: Convert RVXI arithmetic insns 
to decodetree)
7/35 Checking commit b8b2f75bcd6c (target/riscv: Convert RVXI fence insns to 
decodetree)
8/35 Checking commit ac4c92da37f0 (target/riscv: Convert RVXI csr insns to 
decodetree)
9/35 Checking commit f72535b75df2 (target/riscv: Convert RVXM insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#48: 
new file mode 100644

total: 0 errors, 1 warnings, 145 lines checked

Patch 9/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
10/35 Checking commit f376c10a5dff (target/riscv: Convert RV32A insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#54: 
new file mode 100644

total: 0 errors, 1 warnings, 188 lines checked

Patch 10/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
11/35 Checking commit 7c60184c2f69 (target/riscv: Convert RV64A insns to 
decodetree)
12/35 Checking commit ad79932d9200 (target/riscv: Convert RV32F insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#78: 
new file mode 100644

total: 0 errors, 1 warnings, 416 lines checked

Patch 12/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
13/35 Checking commit fabadb15d83d (target/riscv: Convert RV64F insns to 
decodetree)
14/35 Checking commit 1f3be1fde113 (target/riscv: Convert RV32D insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#51: 
new file mode 100644

total: 0 errors, 1 warnings, 373 lines checked

Patch 14/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
15/35 Checking commit 4aeb2ac0bd68 (target/riscv: Convert RV64D insns to 
decodetree)
16/35 Checking commit c2e190ac4193 (target/riscv: Convert RV priv insns to 
decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#41: 
new file mode 100644

total: 0 errors, 1 warnings, 214 lines checked

Patch 16/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
17/35 Checking commit 3d70d65273e0 (target/riscv: Convert quadrant 0 of RVXC 
insns to decodetree)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#31: 
new file mode 100644

ERROR: externs should be avoided in .c files
#246: FILE: target/riscv/translate.c:1067:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 227 lines checked

Patch 17/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

18/35 Checking commit 79ff16294f9c (target/riscv: Convert quadrant 1 of RVXC 
insns to decodetree)
19/35 Checking commit b771a0123b75 (target/riscv: Convert quadrant 2 of RVXC 
insns to decodetree)
20/35 Checking commit 2cfb58f45074 (target/riscv: Remove gen_jalr())
21/35 Checking commit aa9bf2e7675d (target/riscv: Remove manual decoding from 
gen_branch())
22/35 Checking commit 99604155b9ab (target/riscv: Remove manual decoding from 
gen_load())
23/35 Checking commit f02dc68f7e0f (target/riscv: Remove manual decoding from 
gen_store())
24/35 Checking commit acecc8ffa600 (target/riscv: Move gen_arith_imm() decoding 
into trans_* functions)
25/35 Checking commit 6170fd65a1e5 (target/riscv: make ADD/SUB/OR/XOR/AND insn 
use arg lists)
26/35 Checking commit 398d027afad6 (target/riscv: Remove shift and slt insn 
manual decoding)
27/35 Checking commit a6184222b0ac (target/riscv: Remove manual decoding of 
RV32/64M insn)
28/35 Checking commit 2595093a335b (target/riscv: Rename trans_arith to 
gen_arith)
29/35 Checking commit bdfd19cc024a (target/riscv: Remove gen_system())
30/35 Checking commit 4f2f49f7d504 (target/riscv: Remove decode_RV32_64G())
31/35 Checking commit b60814320091 (target/riscv: Convert @cs_2 insns to share 
translation functions)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#42: 
new file mode 100644

ERROR: externs should be avoided in .c files
#182: FILE: target/riscv/translate.c:543:
+bool decode_insn16(DisasContext *ctx, uint16_t insn);

total: 1 errors, 1 warnings, 164 lines checked

Patch 31/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

32/35 Checking commit 4705800e7332 (target/riscv: Convert @cl_d, @cl_w, @cs_d, 
@cs_w insns)
33/35 Checking commit c429dc0bcc8e (target/riscv: Splice fsw_sd and flw_ld for 
riscv32 vs riscv64)
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#28: 
new file mode 100644

total: 0 errors, 1 warnings, 309 lines checked

Patch 33/35 has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
34/35 Checking commit 24b06d360e27 (target/riscv: Splice remaining compressed 
insn pairs for riscv32 vs riscv64)
35/35 Checking commit 3016b4d5628e (target/riscv: Remaining rvc insn reuse 32 
bit translators)
=== OUTPUT END ===

Test command exited with code: 1


The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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