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Re: [Qemu-devel] [PULL 00/12] MIPS queue for January 17, 2019*
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From: |
Aleksandar Markovic |
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Subject: |
Re: [Qemu-devel] [PULL 00/12] MIPS queue for January 17, 2019* |
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Date: |
Fri, 18 Jan 2019 16:58:01 +0000 |
> Hi; I'm afraid this fails 'make check' on all platforms:
My bad. The culprit is found, the fix developed, tests rechecked, and the v2 of
the pull request is going to be sent shortly.
My apologies, and thanks,
Aleksandar
- [Qemu-devel] [PULL 04/12] target/mips: Add fields for SAARI and SAAR CP0 registers, (continued)
- [Qemu-devel] [PULL 04/12] target/mips: Add fields for SAARI and SAAR CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 07/12] target/mips: Update ITU to utilize SAARI and SAAR CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 05/12] target/mips: Provide R/W access to SAARI and SAAR CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 08/12] target/mips: Update ITU to handle bus errors, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 10/12] target/mips: Add CP0 register MemoryMapID, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 12/12] target/mips: Introduce 32 R5900 multimedia registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 03/12] target/mips: Use preprocessor constants for 32 major CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 09/12] target/mips: Amend preprocessor constants for CP0 registers, Aleksandar Markovic, 2019/01/17
- [Qemu-devel] [PULL 11/12] target/mips: Rename 'rn' to 'register_name', Aleksandar Markovic, 2019/01/17
- Re: [Qemu-devel] [PULL 00/12] MIPS queue for January 17, 2019*, Peter Maydell, 2019/01/18
- Re: [Qemu-devel] [PULL 00/12] MIPS queue for January 17, 2019*,
Aleksandar Markovic <=