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[Qemu-devel] [PULL 30/49] target/arm: Implement pauth_addpac
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 30/49] target/arm: Implement pauth_addpac |
Date: |
Fri, 18 Jan 2019 14:57:46 +0000 |
From: Richard Henderson <address@hidden>
This is not really functional yet, because the crypto is not yet
implemented. This, however follows the AddPAC pseudo function.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/pauth_helper.c | 42 ++++++++++++++++++++++++++++++++++++++-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/target/arm/pauth_helper.c b/target/arm/pauth_helper.c
index fa7707e0bfc..bc89dd8c111 100644
--- a/target/arm/pauth_helper.c
+++ b/target/arm/pauth_helper.c
@@ -35,7 +35,47 @@ static uint64_t pauth_computepac(uint64_t data, uint64_t
modifier,
static uint64_t pauth_addpac(CPUARMState *env, uint64_t ptr, uint64_t modifier,
ARMPACKey *key, bool data)
{
- g_assert_not_reached(); /* FIXME */
+ ARMMMUIdx mmu_idx = arm_stage1_mmu_idx(env);
+ ARMVAParameters param = aa64_va_parameters(env, ptr, mmu_idx, data);
+ uint64_t pac, ext_ptr, ext, test;
+ int bot_bit, top_bit;
+
+ /* If tagged pointers are in use, use ptr<55>, otherwise ptr<63>. */
+ if (param.tbi) {
+ ext = sextract64(ptr, 55, 1);
+ } else {
+ ext = sextract64(ptr, 63, 1);
+ }
+
+ /* Build a pointer with known good extension bits. */
+ top_bit = 64 - 8 * param.tbi;
+ bot_bit = 64 - param.tsz;
+ ext_ptr = deposit64(ptr, bot_bit, top_bit - bot_bit, ext);
+
+ pac = pauth_computepac(ext_ptr, modifier, *key);
+
+ /*
+ * Check if the ptr has good extension bits and corrupt the
+ * pointer authentication code if not.
+ */
+ test = sextract64(ptr, bot_bit, top_bit - bot_bit);
+ if (test != 0 && test != -1) {
+ pac ^= MAKE_64BIT_MASK(top_bit - 1, 1);
+ }
+
+ /*
+ * Preserve the determination between upper and lower at bit 55,
+ * and insert pointer authentication code.
+ */
+ if (param.tbi) {
+ ptr &= ~MAKE_64BIT_MASK(bot_bit, 55 - bot_bit + 1);
+ pac &= MAKE_64BIT_MASK(bot_bit, 54 - bot_bit + 1);
+ } else {
+ ptr &= MAKE_64BIT_MASK(0, bot_bit);
+ pac &= ~(MAKE_64BIT_MASK(55, 1) | MAKE_64BIT_MASK(0, bot_bit));
+ }
+ ext &= MAKE_64BIT_MASK(55, 1);
+ return pac | ext | ptr;
}
static uint64_t pauth_original_ptr(uint64_t ptr, ARMVAParameters param)
--
2.20.1
- [Qemu-devel] [PULL 28/49] target/arm: Implement pauth_strip, (continued)
- [Qemu-devel] [PULL 28/49] target/arm: Implement pauth_strip, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 34/49] target/arm: Enable PAuth for user-only, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 13/49] target/arm: Decode PAuth within disas_data_proc_2src, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 24/49] target/arm: Export aa64_va_parameters to internals.h, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 25/49] target/arm: Add aa64_va_parameters_both, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 10/49] target/arm: Decode PAuth within system hint space, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 12/49] target/arm: Decode PAuth within disas_data_proc_1src, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 29/49] target/arm: Implement pauth_auth, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 23/49] target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 27/49] target/arm: Reuse aa64_va_parameters for setting tbflags, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 30/49] target/arm: Implement pauth_addpac,
Peter Maydell <=
- [Qemu-devel] [PULL 09/49] target/arm: Add PAuth helpers, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 32/49] target/arm: Add PAuth system registers, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 14/49] target/arm: Move helper_exception_return to helper-a64.c, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 19/49] target/arm: Move cpu_mmu_index out of line, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 31/49] target/arm: Implement pauth_computepac, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 26/49] target/arm: Decode TBID from TCR, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 35/49] target/arm: Tidy TBI handling in gen_a64_set_pc, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 37/49] target/arm: Reorganize PMCCNTR accesses, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 41/49] target/arm: Implement PMOVSSET, Peter Maydell, 2019/01/18
- [Qemu-devel] [PULL 43/49] target/arm: Make PMCEID[01]_EL0 64 bit registers, add PMCEID[23], Peter Maydell, 2019/01/18