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[Qemu-devel] [PULL v2 39/44] disas: nanoMIPS: Reorder declarations and d
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v2 39/44] disas: nanoMIPS: Reorder declarations and definitions of gpr decoders |
Date: |
Mon, 31 Dec 2018 15:56:35 +0100 |
From: Aleksandar Markovic <address@hidden>
Reorder declarations and definitions of gpr decoders by number of
input bits of corresponding encoding type.
Reviewed-by: Aleksandar Rikalo <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
disas/nanomips.cpp | 200 ++++++++++++++++++++++++++---------------------------
disas/nanomips.h | 7 +-
2 files changed, 104 insertions(+), 103 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index 23556b4..d6632bb 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -292,6 +292,77 @@ uint64 NMD::renumber_registers(uint64 index, uint64
*register_list,
/*
+ * NMD::decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type
+ *
+ * Map a 4-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | └---------------┐
+ * | | | | | | | | | | └---------------┐ |
+ * | | | | | | | | | └---------------┐ | |
+ * | | | | | | | | └---------------┐ | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instructions:
+ *
+ * - ADDU[4X4]
+ * - LW[4X4]
+ * - MOVEP[REV]
+ * - MUL[4X4]
+ * - SW[4X4]
+ */
+uint64 NMD::decode_gpr_gpr4(uint64 d)
+{
+ static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,
+ 16, 17, 18, 19, 20, 21, 22, 23 };
+ return renumber_registers(d, register_list,
+ sizeof(register_list) / sizeof(register_list[0]));
+}
+
+
+/*
+ * NMD::decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type
+ *
+ * Map a 4-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | └---------------------┐
+ * | | | | | | | | | | | └---------------┐ |
+ * | | | | | | | | | | └---------------┐ | |
+ * | | | | | | | | | └---------------┐ | | |
+ * | | | | | | | | └---------------┐ | | | |
+ * | | | | | | | | | | | | | | | |
+ * | | | | | | | | | | | | | | | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * This pattern is the same one used for 'gpr4' gpr encoding type, except for
+ * the input value 3, that is mapped to the output value 0 instead of 11.
+ *
+ * Used in handling following instructions:
+ *
+ * - MOVE.BALC
+ * - MOVEP
+ * - SW[4X4]
+ */
+uint64 NMD::decode_gpr_gpr4_zero(uint64 d)
+{
+ static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,
+ 16, 17, 18, 19, 20, 21, 22, 23 };
+ return renumber_registers(d, register_list,
+ sizeof(register_list) / sizeof(register_list[0]));
+}
+
+
+/*
* NMD::decode_gpr_gpr3() - decoder for 'gpr3' gpr encoding type
*
* Map a 3-bit code to the 5-bit register space according to this pattern:
@@ -390,106 +461,6 @@ uint64 NMD::decode_gpr_gpr3_src_store(uint64 d)
/*
- * NMD::decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type
- *
- * Map a 1-bit code to the 5-bit register space according to this pattern:
- *
- * 1 0
- * | |
- * | |
- * | └---------------------┐
- * └---------------------┐ |
- * | |
- * | |
- * | |
- * | |
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * 3 2 1 0
- *
- * Used in handling following instruction:
- *
- * - MOVE.BALC
- */
-uint64 NMD::decode_gpr_gpr1(uint64 d)
-{
- static uint64 register_list[] = { 4, 5 };
- return renumber_registers(d, register_list,
- sizeof(register_list) / sizeof(register_list[0]));
-}
-
-
-/*
- * NMD::decode_gpr_gpr4_zero() - decoder for 'gpr4.zero' gpr encoding type
- *
- * Map a 4-bit code to the 5-bit register space according to this pattern:
- *
- * 1 0
- * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | | └---------------------┐
- * | | | | | | | | | | | └---------------┐ |
- * | | | | | | | | | | └---------------┐ | |
- * | | | | | | | | | └---------------┐ | | |
- * | | | | | | | | └---------------┐ | | | |
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | | | | | |
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * 3 2 1 0
- *
- * This pattern is the same one used for 'gpr4' gpr encoding type, except for
- * the input value 3, that is mapped to the output value 0 instead of 11.
- *
- * Used in handling following instructions:
- *
- * - MOVE.BALC
- * - MOVEP
- * - SW[4X4]
- */
-uint64 NMD::decode_gpr_gpr4_zero(uint64 d)
-{
- static uint64 register_list[] = { 8, 9, 10, 0, 4, 5, 6, 7,
- 16, 17, 18, 19, 20, 21, 22, 23 };
- return renumber_registers(d, register_list,
- sizeof(register_list) / sizeof(register_list[0]));
-}
-
-
-/*
- * NMD::decode_gpr_gpr4() - decoder for 'gpr4' gpr encoding type
- *
- * Map a 4-bit code to the 5-bit register space according to this pattern:
- *
- * 1 0
- * 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | └---------------┐
- * | | | | | | | | | | └---------------┐ |
- * | | | | | | | | | └---------------┐ | |
- * | | | | | | | | └---------------┐ | | |
- * | | | | | | | | | | | | | | | |
- * | | | | | | | | | | | | | | | |
- * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
- * 3 2 1 0
- *
- * Used in handling following instructions:
- *
- * - ADDU[4X4]
- * - LW[4X4]
- * - MOVEP[REV]
- * - MUL[4X4]
- * - SW[4X4]
- */
-uint64 NMD::decode_gpr_gpr4(uint64 d)
-{
- static uint64 register_list[] = { 8, 9, 10, 11, 4, 5, 6, 7,
- 16, 17, 18, 19, 20, 21, 22, 23 };
- return renumber_registers(d, register_list,
- sizeof(register_list) / sizeof(register_list[0]));
-}
-
-
-/*
* NMD::decode_gpr_gpr2_reg1() - decoder for 'gpr2.reg1' gpr encoding type
*
* Map a 2-bit code to the 5-bit register space according to this pattern:
@@ -549,6 +520,35 @@ uint64 NMD::decode_gpr_gpr2_reg2(uint64 d)
}
+/*
+ * NMD::decode_gpr_gpr1() - decoder for 'gpr1' gpr encoding type
+ *
+ * Map a 1-bit code to the 5-bit register space according to this pattern:
+ *
+ * 1 0
+ * | |
+ * | |
+ * | └---------------------┐
+ * └---------------------┐ |
+ * | |
+ * | |
+ * | |
+ * | |
+ * 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
+ * 3 2 1 0
+ *
+ * Used in handling following instruction:
+ *
+ * - MOVE.BALC
+ */
+uint64 NMD::decode_gpr_gpr1(uint64 d)
+{
+ static uint64 register_list[] = { 4, 5 };
+ return renumber_registers(d, register_list,
+ sizeof(register_list) / sizeof(register_list[0]));
+}
+
+
uint64 NMD::copy(uint64 d)
{
return d;
diff --git a/disas/nanomips.h b/disas/nanomips.h
index d6a6e3f..6482eda 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -105,13 +105,14 @@ private:
uint64 renumber_registers(uint64 index, uint64 *register_list,
size_t register_list_size);
+
+ uint64 decode_gpr_gpr4(uint64 d);
+ uint64 decode_gpr_gpr4_zero(uint64 d);
uint64 decode_gpr_gpr3(uint64 d);
uint64 decode_gpr_gpr3_src_store(uint64 d);
- uint64 decode_gpr_gpr1(uint64 d);
- uint64 decode_gpr_gpr4_zero(uint64 d);
- uint64 decode_gpr_gpr4(uint64 d);
uint64 decode_gpr_gpr2_reg1(uint64 d);
uint64 decode_gpr_gpr2_reg2(uint64 d);
+ uint64 decode_gpr_gpr1(uint64 d);
uint64 copy(uint64 d);
int64 copy(int64 d);
--
2.7.4
- [Qemu-devel] [PULL v2 36/44] disas: nanoMIPS: Comment the decoder of 'gpr2.reg2' gpr encoding type, (continued)
- [Qemu-devel] [PULL v2 36/44] disas: nanoMIPS: Comment the decoder of 'gpr2.reg2' gpr encoding type, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 43/44] tests/tcg: mips: Test R5900 three-operand MADDU, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 35/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg2' gpr encoding type, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 33/44] disas: nanoMIPS: Rename the decoder of 'gpr2.reg1' gpr encoding type, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 42/44] tests/tcg: mips: Test R5900 three-operand MADD1, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 41/44] tests/tcg: mips: Test R5900 three-operand MADD, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 40/44] disas: nanoMIPS: Add a note on documentation, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 38/44] disas: nanoMIPS: Comment the decoder of 'gpr1' gpr encoding type, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 44/44] tests/tcg: mips: Test R5900 three-operand MADDU1, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 18/44] disas: nanoMIPS: Fix order of some invocations, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 39/44] disas: nanoMIPS: Reorder declarations and definitions of gpr decoders,
Aleksandar Markovic <=