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[Qemu-devel] [PULL v2 16/44] disas: nanoMIPS: Remove functions that are
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PULL v2 16/44] disas: nanoMIPS: Remove functions that are not used |
Date: |
Mon, 31 Dec 2018 15:56:12 +0100 |
From: Aleksandar Markovic <address@hidden>
Some functions were not used at all. Compiler doesn't complain
since they are class memebers. Remove them - no future usage is
planned.
Reviewed-by: Aleksandar Rikalo <address@hidden>
Reviewed-by: Stefan Markovic <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
---
disas/nanomips.cpp | 208 -----------------------------------------------------
disas/nanomips.h | 25 -------
2 files changed, 233 deletions(-)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
index e082a3f..4784530 100644
--- a/disas/nanomips.cpp
+++ b/disas/nanomips.cpp
@@ -856,23 +856,6 @@ uint64 NMD::extract_stripe_6(uint64 instruction)
}
-uint64 NMD::extr_xil17il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 17, 1);
- return value;
-}
-
-
-uint64 NMD::extr_xil2il0bs1_il15il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 2, 1);
- value |= extract_bits(instruction, 15, 1);
- return value;
-}
-
-
uint64 NMD::extract_ac_13_12(uint64 instruction)
{
uint64 value = 0;
@@ -923,14 +906,6 @@ uint64 NMD::extract_shift_5_4_3_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs6Fmsb5(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 6);
- return value;
-}
-
-
uint64 NMD::extract_count_19_18_17_16(uint64 instruction)
{
uint64 value = 0;
@@ -947,15 +922,6 @@ uint64 NMD::extract_code_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs4_il22il0bs4Fmsb3(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 4);
- value |= extract_bits(instruction, 22, 4);
- return value;
-}
-
-
uint64 NMD::extract_u_11_10_9_8_7_6_5_4_3_2_1_0(uint64 instruction)
{
uint64 value = 0;
@@ -980,14 +946,6 @@ uint64 NMD::extr_uil3il3bs18Fmsb20(uint64 instruction)
}
-uint64 NMD::extr_xil12il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 12, 1);
- return value;
-}
-
-
uint64 NMD::extr_uil0il2bs4Fmsb5(uint64 instruction)
{
uint64 value = 0;
@@ -1012,14 +970,6 @@ uint64 NMD::extr_uil0il2bs3Fmsb4(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 1);
- return value;
-}
-
-
uint64 NMD::extract_rd3_3_2_1(uint64 instruction)
{
uint64 value = 0;
@@ -1052,22 +1002,6 @@ uint64 NMD::extract_ru_7_6_5_4_3(uint64 instruction)
}
-uint64 NMD::extr_xil21il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 21, 5);
- return value;
-}
-
-
-uint64 NMD::extr_xil9il0bs3Fmsb2(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 9, 3);
- return value;
-}
-
-
uint64 NMD::extract_u_17_to_0(uint64 instruction)
{
uint64 value = 0;
@@ -1076,15 +1010,6 @@ uint64 NMD::extract_u_17_to_0(uint64 instruction)
}
-uint64 NMD::extr_xil14il0bs1_il15il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 14, 1);
- value |= extract_bits(instruction, 15, 1);
- return value;
-}
-
-
uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)
{
uint64 value = 0;
@@ -1094,14 +1019,6 @@ uint64 NMD::extract_rsz4_4_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_xil24il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 24, 1);
- return value;
-}
-
-
int64 NMD::extr_sil0il21bs1_il1il1bs20Tmsb21(uint64 instruction)
{
int64 value = 0;
@@ -1154,15 +1071,6 @@ int64 NMD::extract_shift_21_20_19_18_17_16(uint64
instruction)
}
-uint64 NMD::extr_xil6il0bs3_il10il0bs1Fmsb2(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 6, 3);
- value |= extract_bits(instruction, 10, 1);
- return value;
-}
-
-
uint64 NMD::extract_rd2_3_8(uint64 instruction)
{
uint64 value = 0;
@@ -1172,14 +1080,6 @@ uint64 NMD::extract_rd2_3_8(uint64 instruction)
}
-uint64 NMD::extr_xil16il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 16, 5);
- return value;
-}
-
-
uint64 NMD::extract_code_17_to_0(uint64 instruction)
{
uint64 value = 0;
@@ -1188,14 +1088,6 @@ uint64 NMD::extract_code_17_to_0(uint64 instruction)
}
-uint64 NMD::extr_xil0il0bs12Fmsb11(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 0, 12);
- return value;
-}
-
-
uint64 NMD::extract_size_20_19_18_17_16(uint64 instruction)
{
uint64 value = 0;
@@ -1264,15 +1156,6 @@ uint64 NMD::extract_hs_20_19_18_17_16(uint64 instruction)
}
-uint64 NMD::extr_xil10il0bs1_il14il0bs2Fmsb1(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 1);
- value |= extract_bits(instruction, 14, 2);
- return value;
-}
-
-
uint64 NMD::extract_sel_13_12_11(uint64 instruction)
{
uint64 value = 0;
@@ -1289,14 +1172,6 @@ uint64 NMD::extract_lsb_4_3_2_1_0(uint64 instruction)
}
-uint64 NMD::extr_xil14il0bs2Fmsb1(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 14, 2);
- return value;
-}
-
-
uint64 NMD::extract_gp_2(uint64 instruction)
{
uint64 value = 0;
@@ -1337,14 +1212,6 @@ uint64 NMD::extract_cs_20_19_18_17_16(uint64 instruction)
}
-uint64 NMD::extr_xil16il0bs10Fmsb9(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 16, 10);
- return value;
-}
-
-
uint64 NMD::extract_rt4_9_7_6_5(uint64 instruction)
{
uint64 value = 0;
@@ -1370,14 +1237,6 @@ uint64 NMD::extr_uil0il2bs6Fmsb7(uint64 instruction)
}
-uint64 NMD::extr_xil17il0bs9Fmsb8(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 17, 9);
- return value;
-}
-
-
uint64 NMD::extract_sa_15_14_13(uint64 instruction)
{
uint64 value = 0;
@@ -1468,15 +1327,6 @@ uint64 NMD::extract_bit_16_15_14_13_12_11(uint64
instruction)
}
-uint64 NMD::extr_xil10il0bs1_il11il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 10, 1);
- value |= extract_bits(instruction, 11, 5);
- return value;
-}
-
-
uint64 NMD::extract_mask_20_19_18_17_16_15_14(uint64 instruction)
{
uint64 value = 0;
@@ -1537,22 +1387,6 @@ uint64 NMD::extract_u_20_19_18_17_16_15_14_13(uint64
instruction)
}
-uint64 NMD::extr_xil15il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 15, 1);
- return value;
-}
-
-
-uint64 NMD::extr_xil11il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 11, 5);
- return value;
-}
-
-
uint64 NMD::extr_uil2il2bs16Fmsb17(uint64 instruction)
{
uint64 value = 0;
@@ -1595,15 +1429,6 @@ int64 NMD::extr_sil0il25bs1_il1il1bs24Tmsb25(uint64
instruction)
}
-uint64 NMD::extr_xil0il0bs3_il4il0bs1Fmsb2(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 0, 3);
- value |= extract_bits(instruction, 4, 1);
- return value;
-}
-
-
uint64 NMD::extract_u_1_0(uint64 instruction)
{
uint64 value = 0;
@@ -1621,15 +1446,6 @@ uint64 NMD::extr_uil3il3bs1_il8il2bs1Fmsb3(uint64
instruction)
}
-uint64 NMD::extr_xil9il0bs3_il16il0bs5Fmsb4(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 9, 3);
- value |= extract_bits(instruction, 16, 5);
- return value;
-}
-
-
uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction)
{
uint64 value = 0;
@@ -1638,14 +1454,6 @@ uint64 NMD::extract_fd_10_9_8_7_6(uint64 instruction)
}
-uint64 NMD::extr_xil6il0bs3Fmsb2(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 6, 3);
- return value;
-}
-
-
uint64 NMD::extr_uil0il2bs5Fmsb6(uint64 instruction)
{
uint64 value = 0;
@@ -1679,14 +1487,6 @@ uint64 NMD::extract_ct_25_24_23_22_21(uint64 instruction)
}
-uint64 NMD::extr_xil11il0bs1Fmsb0(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 11, 1);
- return value;
-}
-
-
uint64 NMD::extr_uil2il2bs19Fmsb20(uint64 instruction)
{
uint64 value = 0;
@@ -1713,14 +1513,6 @@ uint64 NMD::extr_uil0il1bs4Fmsb4(uint64 instruction)
}
-uint64 NMD::extr_xil9il0bs2Fmsb1(uint64 instruction)
-{
- uint64 value = 0;
- value |= extract_bits(instruction, 9, 2);
- return value;
-}
-
-
bool NMD::ADDIU_32__cond(uint64 instruction)
{
diff --git a/disas/nanomips.h b/disas/nanomips.h
index c7477c2..4defd35 100644
--- a/disas/nanomips.h
+++ b/disas/nanomips.h
@@ -245,31 +245,6 @@ private:
uint64 extr_uil3il3bs1_il8il2bs1Fmsb3(uint64 instruction);
uint64 extr_uil3il3bs9Fmsb11(uint64 instruction);
uint64 extr_uil4il4bs4Fmsb7(uint64 instruction);
- uint64 extr_xil0il0bs12Fmsb11(uint64 instruction);
- uint64 extr_xil0il0bs3_il4il0bs1Fmsb2(uint64 instruction);
- uint64 extr_xil10il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil10il0bs1_il11il0bs5Fmsb4(uint64 instruction);
- uint64 extr_xil10il0bs1_il14il0bs2Fmsb1(uint64 instruction);
- uint64 extr_xil10il0bs4_il22il0bs4Fmsb3(uint64 instruction);
- uint64 extr_xil10il0bs6Fmsb5(uint64 instruction);
- uint64 extr_xil11il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil11il0bs5Fmsb4(uint64 instruction);
- uint64 extr_xil12il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil14il0bs1_il15il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil14il0bs2Fmsb1(uint64 instruction);
- uint64 extr_xil15il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil16il0bs10Fmsb9(uint64 instruction);
- uint64 extr_xil16il0bs5Fmsb4(uint64 instruction);
- uint64 extr_xil17il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil17il0bs9Fmsb8(uint64 instruction);
- uint64 extr_xil21il0bs5Fmsb4(uint64 instruction);
- uint64 extr_xil24il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil2il0bs1_il15il0bs1Fmsb0(uint64 instruction);
- uint64 extr_xil6il0bs3Fmsb2(uint64 instruction);
- uint64 extr_xil6il0bs3_il10il0bs1Fmsb2(uint64 instruction);
- uint64 extr_xil9il0bs2Fmsb1(uint64 instruction);
- uint64 extr_xil9il0bs3Fmsb2(uint64 instruction);
- uint64 extr_xil9il0bs3_il16il0bs5Fmsb4(uint64 instruction);
bool ADDIU_32__cond(uint64 instruction);
bool ADDIU_RS5__cond(uint64 instruction);
--
2.7.4
- [Qemu-devel] [PULL v2 12/44] target/mips: Support R5900 three-operand MADD and MADDU instructions, (continued)
- [Qemu-devel] [PULL v2 12/44] target/mips: Support R5900 three-operand MADD and MADDU instructions, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 05/44] atomics: Set ATOMIC_REG_SIZE=8 for MIPS n32, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 06/44] target/mips: MXU: Add missing opcodes/decoding for LX* instructions, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 10/44] target/mips: MXU: Add handlers for max/min instructions, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 13/44] target/mips: Support R5900 three-operand MADD1 and MADDU1 instructions, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 02/44] MAINTAINERS: target/mips: Add filter for mips in email subjects, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 11/44] target/mips: MXU: Add handler for an align instruction, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 08/44] target/mips: MXU: Improve the comment containing MXU overview, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 04/44] MAINTAINERS: Add Aleksandar Rikalo as a reviewer for MIPS content, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 15/44] disas: nanoMIPS: Fix preamble text in nanomips.* files, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 16/44] disas: nanoMIPS: Remove functions that are not used,
Aleksandar Markovic <=
- [Qemu-devel] [PULL v2 26/44] disas: nanoMIPS: Comment the decoder of 'gpr3' gpr encoding type, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 27/44] disas: nanoMIPS: Rename the decoder of 'gpr3.src.store' gpr encoding type, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 09/44] target/mips: MXU: Add handlers for logic instructions, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 28/44] disas: nanoMIPS: Comment the decoder of 'gpr3.src.store' gpr encoding type, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 25/44] disas: nanoMIPS: Rename the decoder of 'gpr3' gpr encoding type, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 20/44] disas: nanoMIPS: Fix an FP-related misnomer 1, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 23/44] disas: nanoMIPS: Name more functions in a more descriptive way, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 22/44] disas: nanoMIPS: Fix an FP-related misnomer 3, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 21/44] disas: nanoMIPS: Fix an FP-related misnomer 2, Aleksandar Markovic, 2018/12/31
- [Qemu-devel] [PULL v2 19/44] disas: nanoMIPS: Name some functions in a more descriptive way, Aleksandar Markovic, 2018/12/31