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[Qemu-devel] [PULL 11/27] mac_newworld: simplify IRQ wiring
From: |
David Gibson |
Subject: |
[Qemu-devel] [PULL 11/27] mac_newworld: simplify IRQ wiring |
Date: |
Thu, 13 Dec 2018 15:01:10 +1100 |
From: Greg Kurz <address@hidden>
The OpenPIC have 5 outputs per connected CPU. The machine init code hence
needs a bi-dimensional array (smp_cpu lines, 5 columns) to wire up the irqs
between the PIC and the CPUs.
The current code first allocates an array of smp_cpus pointers to qemu_irq
type, then it allocates another array of smp_cpus * 5 qemu_irq and fills the
first array with pointers to each line of the second array. This is rather
convoluted.
Simplify the logic by introducing a structured type that describes all the
OpenPIC outputs for a single CPU, ie, fixed size of 5 qemu_irq, and only
allocate a smp_cpu sized array of those.
This also allows to use g_new(T, n) instead of g_malloc(sizeof(T) * n)
as recommended in HACKING.
Signed-off-by: Greg Kurz <address@hidden>
Signed-off-by: David Gibson <address@hidden>
---
hw/ppc/mac_newworld.c | 30 +++++++++++++-----------------
include/hw/ppc/openpic.h | 2 ++
2 files changed, 15 insertions(+), 17 deletions(-)
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 14273a123e..8c1bc6dd8a 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -115,7 +115,7 @@ static void ppc_core99_init(MachineState *machine)
PowerPCCPU *cpu = NULL;
CPUPPCState *env = NULL;
char *filename;
- qemu_irq **openpic_irqs;
+ IrqLines *openpic_irqs;
int linux_boot, i, j, k;
MemoryRegion *ram = g_new(MemoryRegion, 1), *bios = g_new(MemoryRegion, 1);
hwaddr kernel_base, initrd_base, cmdline_base = 0;
@@ -249,41 +249,37 @@ static void ppc_core99_init(MachineState *machine)
memory_region_add_subregion(get_system_memory(), 0xf8000000,
sysbus_mmio_get_region(s, 0));
- openpic_irqs = g_malloc0(smp_cpus * sizeof(qemu_irq *));
- openpic_irqs[0] =
- g_malloc0(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
+ openpic_irqs = g_new0(IrqLines, smp_cpus);
for (i = 0; i < smp_cpus; i++) {
/* Mac99 IRQ connection between OpenPIC outputs pins
* and PowerPC input pins
*/
switch (PPC_INPUT(env)) {
case PPC_FLAGS_INPUT_6xx:
- openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
- openpic_irqs[i][OPENPIC_OUTPUT_INT] =
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
- openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
- openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
/* Not connected ? */
- openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
- openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
break;
#if defined(TARGET_PPC64)
case PPC_FLAGS_INPUT_970:
- openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
- openpic_irqs[i][OPENPIC_OUTPUT_INT] =
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
- openpic_irqs[i][OPENPIC_OUTPUT_CINT] =
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
- openpic_irqs[i][OPENPIC_OUTPUT_MCK] =
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
/* Not connected ? */
- openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
/* Check this */
- openpic_irqs[i][OPENPIC_OUTPUT_RESET] =
+ openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
break;
#endif /* defined(TARGET_PPC64) */
@@ -300,7 +296,7 @@ static void ppc_core99_init(MachineState *machine)
k = 0;
for (i = 0; i < smp_cpus; i++) {
for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
- sysbus_connect_irq(s, k++, openpic_irqs[i][j]);
+ sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
}
}
g_free(openpic_irqs);
diff --git a/include/hw/ppc/openpic.h b/include/hw/ppc/openpic.h
index 5eb982197d..dad08fe9be 100644
--- a/include/hw/ppc/openpic.h
+++ b/include/hw/ppc/openpic.h
@@ -20,6 +20,8 @@ enum {
OPENPIC_OUTPUT_NB,
};
+typedef struct IrqLines { qemu_irq irq[OPENPIC_OUTPUT_NB]; } IrqLines;
+
#define OPENPIC_MODEL_RAVEN 0
#define OPENPIC_MODEL_FSL_MPIC_20 1
#define OPENPIC_MODEL_FSL_MPIC_42 2
--
2.19.2
- [Qemu-devel] [PULL 10/27] virtex_ml507: use g_new(T, n) instead of g_malloc(sizeof(T) * n), (continued)
- [Qemu-devel] [PULL 10/27] virtex_ml507: use g_new(T, n) instead of g_malloc(sizeof(T) * n), David Gibson, 2018/12/12
- [Qemu-devel] [PULL 19/27] spapr: introduce a spapr_irq_init() routine, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 15/27] ppc/xive: introduce the XiveNotifier interface, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 16/27] ppc/xive: introduce the XiveRouter model, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 17/27] ppc/xive: introduce the XIVE Event Notification Descriptors, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 18/27] spapr: initialize VSMT before initializing the IRQ backend, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 14/27] ppc/xive: add support for the LSI interrupt sources, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 13/27] ppc/xive: introduce a XIVE interrupt source model, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 25/27] ppc/xive: notify the CPU when the interrupt priority is more privileged, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 23/27] ppc/xive: introduce the XIVE interrupt thread context, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 11/27] mac_newworld: simplify IRQ wiring,
David Gibson <=
- [Qemu-devel] [PULL 20/27] spapr: export and rename the xics_max_server_number() routine, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 21/27] Changes requirement for "vsubsbs" instruction, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 24/27] ppc/xive: introduce a simplified XIVE presenter, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 27/27] spapr/xive: use the VCPU id as a NVT identifier, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 26/27] spapr/xive: introduce a XIVE interrupt controller, David Gibson, 2018/12/12
- [Qemu-devel] [PULL 22/27] ppc/xive: add support for the END Event State Buffers, David Gibson, 2018/12/12
- Re: [Qemu-devel] [PULL 00/27] ppc-for-4.0 queue 20181213, no-reply, 2018/12/13
- Re: [Qemu-devel] [PULL 00/27] ppc-for-4.0 queue 20181213, Peter Maydell, 2018/12/14