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Re: [Qemu-devel] [PATCH v6 07/13] fpu: introduce hardfloat
From: |
Alex Bennée |
Subject: |
Re: [Qemu-devel] [PATCH v6 07/13] fpu: introduce hardfloat |
Date: |
Tue, 04 Dec 2018 12:28:06 +0000 |
User-agent: |
mu4e 1.1.0; emacs 26.1.90 |
Emilio G. Cota <address@hidden> writes:
> The appended paves the way for leveraging the host FPU for a subset
> of guest FP operations. For most guest workloads (e.g. FP flags
> aren't ever cleared, inexact occurs often and rounding is set to the
> default [to nearest]) this will yield sizable performance speedups.
>
> The approach followed here avoids checking the FP exception flags register.
> See the added comment for details.
>
> This assumes that QEMU is running on an IEEE754-compliant FPU and
> that the rounding is set to the default (to nearest). The
> implementation-dependent specifics of the FPU should not matter; things
> like tininess detection and snan representation are still dealt with in
> soft-fp. However, this approach will break on most hosts if we compile
> QEMU with flags such as -ffast-math. We control the flags so this should
> be easy to enforce though.
We don't currently enforce this though although maybe that would be too
much hand holding for compiler ricers hell bent on not understanding the
flags they use.
Reviewed-by: Alex Bennée <address@hidden>
--
Alex Bennée
- Re: [Qemu-devel] [PATCH v6 07/13] fpu: introduce hardfloat,
Alex Bennée <=