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Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RS
From: |
Mark Cave-Ayland |
Subject: |
Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR |
Date: |
Thu, 29 Nov 2018 19:38:47 +0000 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.3.0 |
On 29/11/2018 19:07, Guenter Roeck wrote:
>> I've now completed a boot test of all my SPARC32 OpenBIOS CDROM images with
>> this
>> patch, and whilst it doesn't solve my NextSTEP issue, I don't see any obvious
>> regressions.
>>
>> Note that NetBSD SPARC32 tends to spit out the occasional "!TC on data xfer"
>> message
>> to the console during periods of disk access, however that is something that
>> has
>> always happened and isn't something new introduced by this patch.
>>
>
> That may be because reading the interrupt status resets the TC bit.
> As mentioned above, I think it shouldn't do that. Just a wild guess, but
> it might be worth a try. Can you remove "s->rregs[ESP_RSTAT] &= ~STAT_TC;"
> from the ESP_RINTR case in esp_reg_read() and see what happens ?
>
> [That may expose situations where STAT_TC _should_ be cleared but isn't,
> so we may hit other problems when doing that.]
I've tried that, and over a number of boots it does seem to allow the boot to
get
further: with this change I'd say around 95% of the time NextSTEP now gets past
the
SCSI bus enumeration and hangs at the point where it tries to mount the root
filesystem.
Interestingly enough even if I comment out that line I still see the "!TC on
data
xfer" messages appearing on the NetBSD console...
ATB,
Mark.
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, (continued)
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Mark Cave-Ayland, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Paolo Bonzini, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Mark Cave-Ayland, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Mark Cave-Ayland, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Mark Cave-Ayland, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR,
Mark Cave-Ayland <=
- Re: [Qemu-devel] [PATCH 2/2] scsi: esp: Improve consistency of RSTAT, RSEQ, and RINTR, Guenter Roeck, 2018/11/29
Re: [Qemu-devel] [PATCH 1/2] esp-pci: Fix status register write erase control, Paolo Bonzini, 2018/11/29