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[Qemu-devel] [RFC v2 10/24] riscv: tcg-target: Add the relocation functi
From: |
Alistair Francis |
Subject: |
[Qemu-devel] [RFC v2 10/24] riscv: tcg-target: Add the relocation functions |
Date: |
Tue, 27 Nov 2018 21:08:07 +0000 |
Signed-off-by: Alistair Francis <address@hidden>
Signed-off-by: Michael Clark <address@hidden>
---
tcg/riscv/tcg-target.inc.c | 51 ++++++++++++++++++++++++++++++++++++++
1 file changed, 51 insertions(+)
diff --git a/tcg/riscv/tcg-target.inc.c b/tcg/riscv/tcg-target.inc.c
index ca7ae8939a..9c48679f11 100644
--- a/tcg/riscv/tcg-target.inc.c
+++ b/tcg/riscv/tcg-target.inc.c
@@ -383,6 +383,57 @@ static void tcg_out_opc_jump(TCGContext *s, RISCVInsn opc,
tcg_out32(s, encode_uj(opc, rd, imm));
}
+/*
+ * Relocations
+ */
+
+static void reloc_sbimm12(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+{
+ intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
+ tcg_debug_assert(offset == sextract32(offset, 1, 12) << 1);
+
+ code_ptr[0] |= encode_sbimm12(offset);
+}
+
+static void reloc_jimm20(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+{
+ intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
+ tcg_debug_assert(offset == sextract32(offset, 1, 20) << 1);
+
+ code_ptr[0] |= encode_ujimm12(offset);
+}
+
+static void reloc_call(tcg_insn_unit *code_ptr, tcg_insn_unit *target)
+{
+ intptr_t offset = (intptr_t)target - (intptr_t)code_ptr;
+ tcg_debug_assert(offset == (int32_t)offset);
+
+ int32_t hi20 = ((offset + 0x800) >> 12) << 12;
+ int32_t lo12 = offset - hi20;
+
+ code_ptr[0] |= encode_uimm20(hi20);
+ code_ptr[1] |= encode_imm12(lo12);
+}
+
+static void patch_reloc(tcg_insn_unit *code_ptr, int type,
+ intptr_t value, intptr_t addend)
+{
+ tcg_debug_assert(addend == 0);
+ switch (type) {
+ case R_RISCV_BRANCH:
+ reloc_sbimm12(code_ptr, (tcg_insn_unit *)value);
+ break;
+ case R_RISCV_JAL:
+ reloc_jimm20(code_ptr, (tcg_insn_unit *)value);
+ break;
+ case R_RISCV_CALL:
+ reloc_call(code_ptr, (tcg_insn_unit *)value);
+ break;
+ default:
+ tcg_abort();
+ }
+}
+
void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_addr,
uintptr_t addr)
{
--
2.19.1
- [Qemu-devel] [RFC v2 03/24] linux-user: Add host dependency for RISC-V 64-bit, (continued)
- [Qemu-devel] [RFC v2 03/24] linux-user: Add host dependency for RISC-V 64-bit, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 04/24] exec: Add RISC-V GCC poison macro, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 05/24] riscv: Add the tcg-target header file, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 06/24] riscv: Add the tcg target registers, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 07/24] riscv: tcg-target: Add support for the constraints, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 08/24] riscv: tcg-target: Add the immediate encoders, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 09/24] riscv: tcg-target: Add the instruction emitters, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 10/24] riscv: tcg-target: Add the relocation functions,
Alistair Francis <=
- [Qemu-devel] [RFC v2 11/24] riscv: tcg-target: Add the mov and movi instruction, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 12/24] riscv: tcg-target: Add the extract instructions, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 13/24] riscv: tcg-target: Add the out load and store instructions, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 14/24] riscv: tcg-target: Add branch and jump instructions, Alistair Francis, 2018/11/27
- [Qemu-devel] [RFC v2 15/24] riscv: tcg-target: Add slowpath load and store instructions, Alistair Francis, 2018/11/27