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Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO
From: |
Alistair Francis |
Subject: |
Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device |
Date: |
Wed, 21 Nov 2018 14:11:21 -0800 |
On Wed, Nov 21, 2018 at 2:07 PM Logan Gunthorpe <address@hidden> wrote:
>
>
>
> On 2018-11-21 2:55 p.m., Alistair Francis wrote:
> > It is required for networking for PCIe devices. What PCIe device works
> > for you without this patch? Can you tell me your command line
> > arguments.
>
> I can run it without that patch using a e1000e device and it works just
> fine.
>
> Command line:
>
> $QEMU -s -nographic -machine virt -m 2G -kernel $BBL \
> -object rng-random,filename=/dev/urandom,id=rng0 \
> -append "console=hvc0 ro root=/dev/vda" \
> -device e1000e,netdev=net0 \
> -netdev user,id=net0 \
> -device virtio-rng-device,rng=rng0 \
> -device virtio-blk-device,drive=hd0 \
> -drive file=rootfs.img,format=raw,id=hd0 \
> -device nvme,drive=nvme0,serial=nvme0 \
> -drive file=nvme0.qcow2,if=none,id=nvme0
>
> --
>
> lspcirv-hfu-01:~#
> 00:00.0 Host bridge: Red Hat, Inc. QEMU PCIe Host bridge
> 00:01.0 Ethernet controller: Intel Corporation 82574L Gigabit Network
> Connection
> 00:02.0 Non-Volatile memory controller: Intel Corporation QEMU NVM
> Express Controller (rev 02)
> address@hidden:~#
>
> QEMU 3.0.92 monitor - type 'help' for more information
> (qemu) info pci
> Bus 0, device 0, function 0:
> Host bridge: PCI device 1b36:0008
> PCI subsystem 1af4:1100
> id ""
> Bus 0, device 1, function 0:
> Ethernet controller: PCI device 8086:10d3
> PCI subsystem 8086:0000
> IRQ 11.
> BAR0: 32 bit memory at 0x40040000 [0x4005ffff].
> BAR1: 32 bit memory at 0x40060000 [0x4007ffff].
> BAR2: I/O at 0xffffffffffffffff [0x001e].
> BAR3: 32 bit memory at 0x40080000 [0x40083fff].
> BAR6: 32 bit memory at 0xffffffffffffffff [0x0003fffe].
> id ""
> Bus 0, device 2, function 0:
> Class 0264: PCI device 8086:5845
> PCI subsystem 1af4:1100
> IRQ 9.
> BAR0: 64 bit memory at 0x40084000 [0x40085fff].
> id ""
> (qemu)
and networking works?
Alistair
- Re: [Qemu-devel] [PATCH for-3.2 v7 1/6] hw/riscv/virt: Increase the number of interrupts, (continued)
[Qemu-devel] [PATCH for-3.2 v7 4/6] riscv: Enable VGA and PCIE_VGA, Alistair Francis, 2018/11/21
[Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device,
Alistair Francis <=
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Alistair Francis, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 6/6] hw/riscv/virt: Connect a VirtIO net PCIe device, Logan Gunthorpe, 2018/11/21
[Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Alistair Francis, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Alistair Francis, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Alistair Francis, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Logan Gunthorpe, 2018/11/21
- Re: [Qemu-devel] [PATCH for-3.2 v7 5/6] hw/riscv/sifive_u: Connect the Xilinx PCIe, Alistair Francis, 2018/11/21