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[Qemu-devel] [PATCH for-4.0 10/17] tcg/aarch64: Parameterize the temp fo
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH for-4.0 10/17] tcg/aarch64: Parameterize the temp for tcg_out_goto_long |
Date: |
Mon, 12 Nov 2018 22:44:56 +0100 |
We cannot use TCG_REG_LR (aka TCG_REG_TMP) for tail calls.
Signed-off-by: Richard Henderson <address@hidden>
---
tcg/aarch64/tcg-target.inc.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/tcg/aarch64/tcg-target.inc.c b/tcg/aarch64/tcg-target.inc.c
index c0ba9a6d50..ea5fe33fca 100644
--- a/tcg/aarch64/tcg-target.inc.c
+++ b/tcg/aarch64/tcg-target.inc.c
@@ -1134,14 +1134,15 @@ static inline void tcg_out_goto(TCGContext *s,
tcg_insn_unit *target)
tcg_out_insn(s, 3206, B, offset);
}
-static inline void tcg_out_goto_long(TCGContext *s, tcg_insn_unit *target)
+static inline void tcg_out_goto_long(TCGContext *s, tcg_insn_unit *target,
+ TCGReg scratch)
{
ptrdiff_t offset = target - s->code_ptr;
if (offset == sextract64(offset, 0, 26)) {
tcg_out_insn(s, 3206, BL, offset);
} else {
- tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_TMP, (intptr_t)target);
- tcg_out_insn(s, 3207, BR, TCG_REG_TMP);
+ tcg_out_movi(s, TCG_TYPE_I64, scratch, (intptr_t)target);
+ tcg_out_insn(s, 3207, BR, scratch);
}
}
@@ -1716,10 +1717,10 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc,
case INDEX_op_exit_tb:
/* Reuse the zeroing that exists for goto_ptr. */
if (a0 == 0) {
- tcg_out_goto_long(s, s->code_gen_epilogue);
+ tcg_out_goto_long(s, s->code_gen_epilogue, TCG_REG_TMP);
} else {
tcg_out_movi(s, TCG_TYPE_I64, TCG_REG_X0, a0);
- tcg_out_goto_long(s, tb_ret_addr);
+ tcg_out_goto_long(s, tb_ret_addr, TCG_REG_TMP);
}
break;
--
2.17.2
- [Qemu-devel] [PATCH for-4.0 00/17] tcg: Move softmmu out-of-line, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 03/17] tcg/i386: Change TCG_REG_L[01] to not overlap function arguments, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 02/17] tcg/i386: Return a base register from tcg_out_tlb_load, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 01/17] tcg/i386: Add constraints for r8 and r9, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 06/17] tcg: Add TCG_TARGET_NEED_LDST_OOL_LABELS, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 08/17] tcg/aarch64: Add constraints for x0, x1, x2, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 05/17] tcg: Return success from patch_reloc, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 04/17] tcg/i386: Force qemu_ld/st arguments into fixed registers, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 10/17] tcg/aarch64: Parameterize the temp for tcg_out_goto_long,
Richard Henderson <=
- [Qemu-devel] [PATCH for-4.0 09/17] tcg/aarch64: Parameterize the temps for tcg_out_tlb_read, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 07/17] tcg/i386: Use TCG_TARGET_NEED_LDST_OOL_LABELS, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 11/17] tcg/aarch64: Use B not BL for tcg_out_goto_long, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 13/17] tcg/arm: Parameterize the temps for tcg_out_tlb_read, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 12/17] tcg/aarch64: Use TCG_TARGET_NEED_LDST_OOL_LABELS, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 14/17] tcg/arm: Add constraints for R0-R5, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 16/17] tcg/arm: Force qemu_ld/st arguments into fixed registers, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 15/17] tcg/arm: Reduce the number of temps for tcg_out_tlb_read, Richard Henderson, 2018/11/12
- [Qemu-devel] [PATCH for-4.0 17/17] tcg/arm: Use TCG_TARGET_NEED_LDST_OOL_LABELS, Richard Henderson, 2018/11/12
- Re: [Qemu-devel] [PATCH for-4.0 00/17] tcg: Move softmmu out-of-line, no-reply, 2018/11/13