Re: [Qemu-devel] [PATCH v3 27/35] target/riscv: Remove manual decoding of RV32/64M insn

[Richard Henderson]

On 10/31/18 1:20 PM, Bastian Koppelmann wrote:
> Signed-off-by: Bastian Koppelmann <address@hidden>
> Signed-off-by: Peer Adelt <address@hidden>
> ---
> v2 -> v3:
>     - trans_mulw now uses gen_mulw which properly sign extends the result
>     - gen_arith_w -> gen_arith_div_w
>     - gen_arith_div_w properly sign extends the resul

Reviewed-by: Richard Henderson <address@hidden>


r~