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Re: [Qemu-devel] [PATCH v2 24/29] target/riscv: make ADD/SUB/OR/XOR/AND


From: Richard Henderson
Subject: Re: [Qemu-devel] [PATCH v2 24/29] target/riscv: make ADD/SUB/OR/XOR/AND insn use arg lists
Date: Tue, 23 Oct 2018 09:55:33 +0100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1

On 10/23/18 9:53 AM, Richard Henderson wrote:
> On 10/20/18 8:14 AM, Bastian Koppelmann wrote:
>> +static bool trans_arith(DisasContext *ctx, arg_arith *a,
>> +                        void(*func)(TCGv, TCGv, TCGv))
> 
> gen_arith.

Oh, right, last patch.

Reviewed-by: Richard Henderson <address@hidden>

r~




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