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[Qemu-devel] [PULL 04/45] target/arm: V8M should not imply V7VE
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 04/45] target/arm: V8M should not imply V7VE |
Date: |
Fri, 19 Oct 2018 17:56:54 +0100 |
From: Richard Henderson <address@hidden>
Instantiating mps2-an505 (cortex-m33) will fail make check when
V7VE asserts that ID_ISAR0.Divide includes ARM division. It is
also wrong to include ARM_FEATURE_LPAE.
Signed-off-by: Richard Henderson <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/cpu.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 4f6756a4e2e..12e6273d603 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -814,7 +814,11 @@ static void arm_cpu_realizefn(DeviceState *dev, Error
**errp)
/* Some features automatically imply others: */
if (arm_feature(env, ARM_FEATURE_V8)) {
- set_feature(env, ARM_FEATURE_V7VE);
+ if (arm_feature(env, ARM_FEATURE_M)) {
+ set_feature(env, ARM_FEATURE_V7);
+ } else {
+ set_feature(env, ARM_FEATURE_V7VE);
+ }
}
if (arm_feature(env, ARM_FEATURE_V7VE)) {
/* v7 Virtualization Extensions. In real hardware this implies
--
2.19.1
- [Qemu-devel] [PULL 00/45] target-arm queue, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 01/45] ssi-sd: Make devices picking up backends unavailable with -device, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 02/45] target/arm: Add support for VCPU event states, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 04/45] target/arm: V8M should not imply V7VE,
Peter Maydell <=
- [Qemu-devel] [PULL 06/45] target/arm: Convert division from feature bits to isar0 tests, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 07/45] target/arm: Convert jazelle from feature bit to isar1 test, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 08/45] target/arm: Convert t32ee from feature bit to isar3 test, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 09/45] target/arm: Convert sve from feature bit to aa64pfr0 test, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 03/45] target/arm: Move some system registers into a substructure, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 05/45] target/arm: Convert v8 extensions from feature bits to isar tests, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 10/45] target/arm: Convert v8.2-fp16 from feature bit to aa64pfr0 test, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 11/45] target/arm: Improve debug logging of AArch32 exception return, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 21/45] hw/arm/boot: Increase compliance with kernel arm64 boot protocol, Peter Maydell, 2018/10/19
- [Qemu-devel] [PULL 20/45] target/arm: Report correct syndrome for FP/SIMD traps to Hyp mode, Peter Maydell, 2018/10/19