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Re: [Qemu-devel] [PATCH v2 2/3] target/arm: Only flush tlb if ASID chang


From: Philippe Mathieu-Daudé
Subject: Re: [Qemu-devel] [PATCH v2 2/3] target/arm: Only flush tlb if ASID changes
Date: Fri, 19 Oct 2018 07:00:45 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0

On 19/10/2018 03:56, Richard Henderson wrote:
> Since QEMU does not implement ASIDs, changes to the ASID must flush the
> tlb.  However, if the ASID does not change there is no reason to flush.
> 
> In testing a boot of the Ubuntu installer to the first menu, this reduces
> the number of flushes by 30%, or nearly 600k instances.
> 
> Reviewed-by: Aaron Lindsay <address@hidden>
> Signed-off-by: Richard Henderson <address@hidden>

Reviewed-by: Philippe Mathieu-Daudé <address@hidden>

> ---
>  target/arm/helper.c | 8 +++-----
>  1 file changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index 24bbde4f76..ed70ac645e 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -2709,12 +2709,10 @@ static void vmsa_tcr_el1_write(CPUARMState *env, 
> const ARMCPRegInfo *ri,
>  static void vmsa_ttbr_write(CPUARMState *env, const ARMCPRegInfo *ri,
>                              uint64_t value)
>  {
> -    /* 64 bit accesses to the TTBRs can change the ASID and so we
> -     * must flush the TLB.
> -     */
> -    if (cpreg_field_is_64bit(ri)) {
> +    /* If the ASID changes (with a 64-bit write), we must flush the TLB.  */
> +    if (cpreg_field_is_64bit(ri) &&
> +        extract64(raw_read(env, ri) ^ value, 48, 16) != 0) {
>          ARMCPU *cpu = arm_env_get_cpu(env);
> -
>          tlb_flush(CPU(cpu));
>      }
>      raw_write(env, ri, value);
> 



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