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Re: [Qemu-devel] [PATCH v3 00/10] target/arm: Rely on id regs instead of
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v3 00/10] target/arm: Rely on id regs instead of features |
Date: |
Tue, 16 Oct 2018 11:48:48 +0100 |
On 8 October 2018 at 22:21, Richard Henderson
<address@hidden> wrote:
> This edition fixes a number of conflicts with master, and adds
> a few field definitions from ARMv8.5, courtesy of Philippe.
>
> It also fixes a big think-o in a last-minute change to the
> sve system mode patch set that was applied to master today.
> That would be patch 1. Sorry for not testing the original
> more thoroughly.
>
>
> r~
>
>
> Richard Henderson (10):
> target/arm: Fix aarch64_sve_change_el wrt EL0
> target/arm: Define fields of ISAR registers
> target/arm: Align cortex-r5 id_isar0
> target/arm: Fix cortex-a7 id_isar0
I'm applying these patches (1,2,4,5) to target-arm.next.
thanks
-- PMM
- Re: [Qemu-devel] [PATCH v3 01/10] target/arm: Fix aarch64_sve_change_el wrt EL0, (continued)
- [Qemu-devel] [PATCH v3 09/10] target/arm: Convert sve from feature bit to aa64pfr0 test, Richard Henderson, 2018/10/08
- [Qemu-devel] [PATCH v3 06/10] target/arm: Convert division from feature bits to isar0 tests, Richard Henderson, 2018/10/08
- [Qemu-devel] [PATCH v3 05/10] target/arm: Fix cortex-a7 id_isar0, Richard Henderson, 2018/10/08
- [Qemu-devel] [PATCH v3 04/10] target/arm: Align cortex-r5 id_isar0, Richard Henderson, 2018/10/08
- [Qemu-devel] [PATCH v3 02/10] target/arm: Define fields of ISAR registers, Richard Henderson, 2018/10/08
- [Qemu-devel] [PATCH v3 07/10] target/arm: Convert jazelle from feature bit to isar1 test, Richard Henderson, 2018/10/08
- [Qemu-devel] [PATCH v3 03/10] target/arm: Convert v8 extensions from feature bits to isar tests, Richard Henderson, 2018/10/08
- Re: [Qemu-devel] [PATCH v3 00/10] target/arm: Rely on id regs instead of features,
Peter Maydell <=