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Re: [Qemu-devel] [PATCH 01/10] target/arm: Improve debug logging of AArc
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 01/10] target/arm: Improve debug logging of AArch32 exception return |
Date: |
Sun, 14 Oct 2018 09:12:15 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 |
On 10/12/18 7:42 AM, Peter Maydell wrote:
> For AArch32, exception return happens through certain kinds
> of CPSR write. We don't currently have any CPU_LOG_INT logging
> of these events (unlike AArch64, where we log in the ERET
> instruction). Add some suitable logging.
>
> This will log exception returns like this:
> Exception return from AArch32 hyp to usr PC 0x80100374
>
> paralleling the existing logging in the exception_return
> helper for AArch64 exception returns:
> Exception return from AArch64 EL2 to AArch64 EL0 PC 0x8003045c
> Exception return from AArch64 EL2 to AArch32 EL0 PC 0x8003045c
>
> (Note that an AArch32 exception return can only be
> AArch32->AArch32, never to AArch64.)
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
Reviewed-by: Richard Henderson <address@hidden>
> + static const char * const cpu_mode_names[16] = {
> + "usr", "fiq", "irq", "svc", "???", "???", "mon", "abt",
> + "???", "???", "hyp", "und", "???", "???", "???", "sys"
> + };
Nit: Better as static const char cpu_mode_names[16][4].
For tiny strings like this, the pointer to a separate string is larger than the
string itself.
r~
- [Qemu-devel] [PATCH 00/10] target/arm: more HCR bits, improve syndrome reporting, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 02/10] target/arm: Make switch_mode() file-local, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 01/10] target/arm: Improve debug logging of AArch32 exception return, Peter Maydell, 2018/10/12
- Re: [Qemu-devel] [PATCH 01/10] target/arm: Improve debug logging of AArch32 exception return,
Richard Henderson <=
- [Qemu-devel] [PATCH 03/10] target/arm: Implement HCR.FB, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 04/10] target/arm: Implement HCR.DC, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 05/10] target/arm: ISR_EL1 bits track virtual interrupts if IMO/FMO set, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 09/10] target/arm: Get IL bit correct for v7 syndrome values, Peter Maydell, 2018/10/12
- [Qemu-devel] [PATCH 07/10] target/arm: Implement HCR.PTW, Peter Maydell, 2018/10/12