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Re: [Qemu-devel] [PATCH v4 5/9] x86_iommu/amd: Prepare for interrupt rem


From: Peter Xu
Subject: Re: [Qemu-devel] [PATCH v4 5/9] x86_iommu/amd: Prepare for interrupt remap support
Date: Fri, 28 Sep 2018 13:58:26 +0800
User-agent: Mutt/1.10.1 (2018-07-13)

On Thu, Sep 27, 2018 at 04:45:57PM +0000, Singh, Brijesh wrote:

[...]

> +static MemTxResult amdvi_mem_ir_write(void *opaque, hwaddr addr,
> +                                      uint64_t value, unsigned size,
> +                                      MemTxAttrs attrs)
> +{
> +    int ret;
> +    MSIMessage from = { 0, 0 }, to = { 0, 0 };
> +    uint16_t sid = AMDVI_IOAPIC_SB_DEVID;
> +
> +    from.address = (uint64_t) addr + AMDVI_INT_ADDR_FIRST;
> +    from.data = (uint32_t) value;
> +
> +    trace_amdvi_mem_ir_write_req(addr, value, size);
> +
> +    if (!attrs.unspecified) {
> +        /* We have explicit Source ID */
> +        sid = attrs.requester_id;
> +    }
> +
> +    ret = amdvi_int_remap_msi(opaque, &from, &to, sid);
> +    if (ret < 0) {
> +        /* TODO: log the event using IOMMU log event interface */
> +        error_report("failed to remap interrupt from devid 0x%x", sid);

Please use error_report_once() or tracepoints.  The rest looks good.

Thanks,

> +        return MEMTX_ERROR;
> +    }
> +
> +    apic_get_class()->send_msi(&to);
> +
> +    trace_amdvi_mem_ir_write(to.address, to.data);
> +    return MEMTX_OK;
> +}

-- 
Peter Xu



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