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[Qemu-devel] [PULL 10/21] hw/arm/smmu-common: Fix the name of the iommu
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 10/21] hw/arm/smmu-common: Fix the name of the iommu memory regions |
Date: |
Tue, 25 Sep 2018 14:41:33 +0100 |
From: Eric Auger <address@hidden>
At the point smmu_find_add_as() gets called, the bus number might
not be computed. Let's change the name of IOMMU memory region and
just use the devfn and an incrementing index.
The name only is used for debug.
Signed-off-by: Eric Auger <address@hidden>
Message-id: address@hidden
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
---
hw/arm/smmu-common.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index 55c75d65d2e..3f55cfd1934 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -311,6 +311,7 @@ static AddressSpace *smmu_find_add_as(PCIBus *bus, void
*opaque, int devfn)
SMMUState *s = opaque;
SMMUPciBus *sbus = g_hash_table_lookup(s->smmu_pcibus_by_busptr, bus);
SMMUDevice *sdev;
+ static uint index;
if (!sbus) {
sbus = g_malloc0(sizeof(SMMUPciBus) +
@@ -321,9 +322,8 @@ static AddressSpace *smmu_find_add_as(PCIBus *bus, void
*opaque, int devfn)
sdev = sbus->pbdev[devfn];
if (!sdev) {
- char *name = g_strdup_printf("%s-%d-%d",
- s->mrtypename,
- pci_bus_num(bus), devfn);
+ char *name = g_strdup_printf("%s-%d-%d", s->mrtypename, devfn,
index++);
+
sdev = sbus->pbdev[devfn] = g_new0(SMMUDevice, 1);
sdev->smmu = s;
--
2.19.0
- [Qemu-devel] [PULL 19/21] hw/arm/aspeed: Add an Aspeed machine class, (continued)
- [Qemu-devel] [PULL 19/21] hw/arm/aspeed: Add an Aspeed machine class, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 06/21] arm: Add BBC micro:bit machine, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 16/21] hw/timer/cmsdk-apb-dualtimer: Add missing 'break' statements, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 08/21] aspeed/i2c: Handle receive command in separate function, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 21/21] target/arm: Start AArch32 CPUs with EL2 but not EL3 in Hyp mode, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 11/21] hw/arm/smmuv3: fix eventq recording and IRQ triggerring, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 07/21] aspeed/i2c: interrupts should be cleared by software only, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 13/21] hw/intc/arm_gic: Drop GIC_BASE_IRQ macro, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 15/21] hw/net/pcnet-pci: Unify pcnet_ioport_read/write and pcnet_mmio_read/write, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 12/21] hw/intc/arm_gic: Document QEMU interface, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 10/21] hw/arm/smmu-common: Fix the name of the iommu memory regions,
Peter Maydell <=
- [Qemu-devel] [PULL 09/21] aspeed/i2c: Fix receive done interrupt handling, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 17/21] aspeed/timer: fix compile breakage with clang 3.4.2, Peter Maydell, 2018/09/25
- [Qemu-devel] [PULL 14/21] hw/net/pcnet-pci: Convert away from old_mmio accessors, Peter Maydell, 2018/09/25