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Re: [Qemu-devel] [PATCH 1/2] target/mips: Increase the 'supported instru
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From: |
Philippe Mathieu-Daudé |
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Subject: |
Re: [Qemu-devel] [PATCH 1/2] target/mips: Increase the 'supported instructions' flags holder size |
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Date: |
Tue, 11 Sep 2018 08:52:28 -0300 |
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User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.0 |
On 9/11/18 6:33 AM, Aleksandar Markovic wrote:
>> From: Philippe Mathieu-Daudé <address@hidden> on behalf of Philippe
>> Mathieu-Daudé <address@hidden>
>> Sent: Sunday, September 9, 2018 3:34 AM
>>
>> Subject: [PATCH 1/2] target/mips: Increase the 'supported instructions'
>> flags holder size
>>
>> Currently this holder is limited to at most 32 flags on
>> a 32-bit architecture, which lets an unique bit available
>> for another 'chip specific instructions' flag.
>>
>> Relax this limit using a 64-bit integer.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
>> ---
>> target/mips/cpu.h | 2 +-
>> target/mips/internal.h | 2 +-
>> target/mips/translate.c | 4 ++--
>> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> "int insn_flags;" in DisasContext definition in target/mips/translate.c needs
> to be updated as well.
Oops I missed this one, good catch :)