[Qemu-devel] [Question] Question about the i440FX device

[Li Qiang]

Hello all,

I want to know why the i440FX in the following 'info qtree' information is
laid under the pci.0 bus.  In the chip spec here:
-->https://wiki.qemu.org/images/b/bb/29054901.pdf
I don't see this device.

Can anyone give me some hints?

Thanks,
Li Qiang

bus: main-system-bus
  type System
  dev: hpet, id ""
  dev: kvm-ioapic, id ""
  dev: i440FX-pcihost, id ""
    pci-hole64-size = 18446744073709551615 (16 EiB)
    short_root_bus = 0 (0x0)
    bus: pci.0
      type PCI
      dev: virtio-balloon-pci, id "balloon0"
      dev: cirrus-vga, id "video0"
      dev: PIIX4_PM, id "
      dev: piix3-ide, id ""

      dev: PIIX3, id ""

      dev: *i440FX*, id ""
        addr = 00.0
        romfile = ""
        rombar = 1 (0x1)
        multifunction = false
        command_serr_enable = true
        x-pcie-lnksta-dllla = true
        class Host bridge, addr 00:00.0, pci id 8086:1237 (sub 1af4:1100)