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Re: [Qemu-devel] [PATCH v1 2/8] s390x/tcg: store in the TB flags if AFP
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH v1 2/8] s390x/tcg: store in the TB flags if AFP is enabled |
Date: |
Wed, 22 Aug 2018 09:41:17 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 08/22/2018 12:57 AM, David Hildenbrand wrote:
> We exit the TB when changing the control registers, so just like PSW
> bits, this should always be consistent for a TB.
>
> Using the PSW bit semantic makes things a lot easier compared to
> manually defining the sapre, shifted bits.
>
> Signed-off-by: David Hildenbrand <address@hidden>
> ---
> target/s390x/cpu.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
Reviewed-by: Richard Henderson <address@hidden>
r~
- [Qemu-devel] [PATCH v1 0/8] s390x/tcg: instruction flags and AFP registers, David Hildenbrand, 2018/08/22
- [Qemu-devel] [PATCH v1 7/8] s390x/tcg: fix FP register pair checks, David Hildenbrand, 2018/08/22
- [Qemu-devel] [PATCH v1 8/8] s390x/tcg: refactor specification checking, David Hildenbrand, 2018/08/22
- [Qemu-devel] [PATCH v1 6/8] s390x/tcg: handle privileged instructions via flags, David Hildenbrand, 2018/08/22
- [Qemu-devel] [PATCH v1 5/8] s390x/tcg: check for AFP-register, BFP and DFP data exceptions, David Hildenbrand, 2018/08/22
- [Qemu-devel] [PATCH v1 3/8] s390x/tcg: support flags for instructions, David Hildenbrand, 2018/08/22
- [Qemu-devel] [PATCH v1 2/8] s390x/tcg: store in the TB flags if AFP is enabled, David Hildenbrand, 2018/08/22
- Re: [Qemu-devel] [PATCH v1 2/8] s390x/tcg: store in the TB flags if AFP is enabled,
Richard Henderson <=
- [Qemu-devel] [PATCH v1 1/8] s390x/tcg: factor out and fix DATA exception injection, David Hildenbrand, 2018/08/22
- Re: [Qemu-devel] [PATCH v1 1/8] s390x/tcg: factor out and fix DATA exception injection, David Hildenbrand, 2018/08/24
- [Qemu-devel] [PATCH v1 4/8] s390x/tcg: add instruction flags for floating point instructions, David Hildenbrand, 2018/08/22