[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[Qemu-devel] [PULL 66/74] i2c: pm_smbus: Add interrupt handling
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 66/74] i2c: pm_smbus: Add interrupt handling |
Date: |
Tue, 21 Aug 2018 19:02:38 +0200 |
From: Corey Minyard <address@hidden>
Add the necessary code so that interrupts actually work from
the pm_smbus device.
Signed-off-by: Corey Minyard <address@hidden>
Cc: Michael S. Tsirkin <address@hidden>
Cc: Paolo Bonzini <address@hidden>
Message-Id: <address@hidden>
Signed-off-by: Paolo Bonzini <address@hidden>
---
hw/i2c/pm_smbus.c | 14 +++++++++++++-
hw/i2c/smbus_ich9.c | 16 ++++++++++++++++
include/hw/i2c/pm_smbus.h | 2 ++
3 files changed, 31 insertions(+), 1 deletion(-)
diff --git a/hw/i2c/pm_smbus.c b/hw/i2c/pm_smbus.c
index 32132be..6322f07 100644
--- a/hw/i2c/pm_smbus.c
+++ b/hw/i2c/pm_smbus.c
@@ -214,6 +214,12 @@ static void smb_transaction_start(PMSMBus *s)
s->smb_stat |= STS_HOST_BUSY;
}
+static bool
+smb_irq_value(PMSMBus *s)
+{
+ return ((s->smb_stat & ~STS_HOST_BUSY) != 0) && (s->smb_ctl & CTL_INTREN);
+}
+
static void smb_ioport_writeb(void *opaque, hwaddr addr, uint64_t val,
unsigned width)
{
@@ -309,7 +315,9 @@ static void smb_ioport_writeb(void *opaque, hwaddr addr,
uint64_t val,
}
out:
- return;
+ if (s->set_irq) {
+ s->set_irq(s, smb_irq_value(s));
+ }
}
static uint64_t smb_ioport_readb(void *opaque, hwaddr addr, unsigned width)
@@ -365,6 +373,10 @@ static uint64_t smb_ioport_readb(void *opaque, hwaddr
addr, unsigned width)
SMBUS_DPRINTF("SMB readb port=0x%04" HWADDR_PRIx " val=0x%02x\n",
addr, val);
+ if (s->set_irq) {
+ s->set_irq(s, smb_irq_value(s));
+ }
+
return val;
}
diff --git a/hw/i2c/smbus_ich9.c b/hw/i2c/smbus_ich9.c
index a66a114..522a703 100644
--- a/hw/i2c/smbus_ich9.c
+++ b/hw/i2c/smbus_ich9.c
@@ -40,6 +40,8 @@
typedef struct ICH9SMBState {
PCIDevice dev;
+ bool irq_enabled;
+
PMSMBus smb;
} ICH9SMBState;
@@ -109,11 +111,25 @@ static void ich9_smb_class_init(ObjectClass *klass, void
*data)
dc->user_creatable = false;
}
+static void ich9_smb_set_irq(PMSMBus *pmsmb, bool enabled)
+{
+ ICH9SMBState *s = pmsmb->opaque;
+
+ if (enabled == s->irq_enabled) {
+ return;
+ }
+
+ s->irq_enabled = enabled;
+ pci_set_irq(&s->dev, enabled);
+}
+
I2CBus *ich9_smb_init(PCIBus *bus, int devfn, uint32_t smb_io_base)
{
PCIDevice *d =
pci_create_simple_multifunction(bus, devfn, true,
TYPE_ICH9_SMB_DEVICE);
ICH9SMBState *s = ICH9_SMB_DEVICE(d);
+ s->smb.set_irq = ich9_smb_set_irq;
+ s->smb.opaque = s;
return s->smb.smbus;
}
diff --git a/include/hw/i2c/pm_smbus.h b/include/hw/i2c/pm_smbus.h
index 99d5489..1afa3cf 100644
--- a/include/hw/i2c/pm_smbus.h
+++ b/include/hw/i2c/pm_smbus.h
@@ -23,6 +23,8 @@ typedef struct PMSMBus {
/* Set by the user. */
bool i2c_enable;
+ void (*set_irq)(struct PMSMBus *s, bool enabled);
+ void *opaque;
/* Internally used by pm_smbus. */
--
1.8.3.1
- [Qemu-devel] [PULL 59/74] util/oslib-win32: indicate alignment for qemu_anon_ram_alloc(), (continued)
- [Qemu-devel] [PULL 59/74] util/oslib-win32: indicate alignment for qemu_anon_ram_alloc(), Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 58/74] pc-dimm: assign and verify the "slot" property during pre_plug, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 72/74] Revert "chardev: tcp: postpone async connection setup", Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 74/74] test-char: add socket reconnect test, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 57/74] ipmi: Use proper struct reference for BT vmstate, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 67/74] i2c: pm_smbus: Don't delay host status register busy bit when interrupts are enabled, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 68/74] i2c: pm_smbus: Add the ability to force block transfer enable, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 64/74] i2c: pm_smbus: Make the I2C block read command read-only, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 63/74] i2c: pm_smbus: Fix the semantics of block I2C transfers, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 62/74] i2c: pm_smbus: Clean up some style issues, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 66/74] i2c: pm_smbus: Add interrupt handling,
Paolo Bonzini <=
- [Qemu-devel] [PULL 65/74] i2c: pm_smbus: Add block transfer capability, Paolo Bonzini, 2018/08/21
- Re: [Qemu-devel] [PULL 00/74] Misc patches for 2018-08-21, Peter Maydell, 2018/08/23