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[Qemu-devel] [PULL 69/74] target/i386: update MPX flags when CPL changes
From: |
Paolo Bonzini |
Subject: |
[Qemu-devel] [PULL 69/74] target/i386: update MPX flags when CPL changes |
Date: |
Tue, 21 Aug 2018 19:02:41 +0200 |
Signed-off-by: Paolo Bonzini <address@hidden>
---
target/i386/cpu.h | 7 ++++---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 9cad581..b572a8e 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1515,6 +1515,8 @@ int cpu_x86_support_mca_broadcast(CPUX86State *env);
int cpu_get_pic_interrupt(CPUX86State *s);
/* MSDOS compatibility mode FPU exception support */
void cpu_set_ferr(CPUX86State *s);
+/* mpx_helper.c */
+void cpu_sync_bndcs_hflags(CPUX86State *env);
/* this function must always be used to load data in the segment
cache: it synchronizes the hflags with the segment cache values */
@@ -1557,6 +1559,8 @@ static inline void cpu_x86_load_seg_cache(CPUX86State
*env,
#error HF_CPL_MASK is hardcoded
#endif
env->hflags = (env->hflags & ~HF_CPL_MASK) | cpl;
+ /* Possibly switch between BNDCFGS and BNDCFGU */
+ cpu_sync_bndcs_hflags(env);
}
new_hflags = (env->segs[R_SS].flags & DESC_B_MASK)
>> (DESC_B_SHIFT - HF_SS32_SHIFT);
@@ -1889,9 +1893,6 @@ void apic_handle_tpr_access_report(DeviceState *d,
target_ulong ip,
*/
void x86_cpu_change_kvm_default(const char *prop, const char *value);
-/* mpx_helper.c */
-void cpu_sync_bndcs_hflags(CPUX86State *env);
-
/* Return name of 32-bit register, from a R_* constant */
const char *get_register_name_32(unsigned int reg);
--
1.8.3.1
- [Qemu-devel] [PULL 40/74] test-rcu-list: access goflag with atomics, (continued)
- [Qemu-devel] [PULL 40/74] test-rcu-list: access goflag with atomics, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 42/74] test-rcu-list: abstract the list implementation, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 55/74] vhost-scsi: unify vhost-scsi get_features implementations, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 53/74] cpus: allow cpu_get_ticks out of BQL, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 50/74] cpus: protect all icount computation with seqlock, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 26/74] hmp-commands-info: add sync-profile, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 56/74] vhost-scsi: expose 't10_pi' property for VIRTIO_SCSI_F_T10_PI, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 54/74] vhost-user-scsi: move host_features into VHostSCSICommon, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 29/74] fw_cfg: import & use linux/qemu_fw_cfg.h, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 35/74] target-i386: fix segment limit check in ljmp, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 69/74] target/i386: update MPX flags when CPL changes,
Paolo Bonzini <=
- [Qemu-devel] [PULL 61/74] pc-dimm: assign and verify the "addr" property during pre_plug, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 70/74] KVM: cleanup unnecessary #ifdef KVM_CAP_..., Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 73/74] char-socket: update all ioc handlers when changing context, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 60/74] pc: drop memory region alignment check for 0, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 71/74] Revert "chardev: tcp: postpone TLS work until machine done", Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 59/74] util/oslib-win32: indicate alignment for qemu_anon_ram_alloc(), Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 58/74] pc-dimm: assign and verify the "slot" property during pre_plug, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 72/74] Revert "chardev: tcp: postpone async connection setup", Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 74/74] test-char: add socket reconnect test, Paolo Bonzini, 2018/08/21
- [Qemu-devel] [PULL 57/74] ipmi: Use proper struct reference for BT vmstate, Paolo Bonzini, 2018/08/21