Re: [Qemu-devel] [Bug 1787754] [NEW] qemu sparc -cpu help does not generate correct display

[Artyom Tarasenko]

On Sat, Aug 18, 2018 at 8:56 PM Donald R Laster Jr
<address@hidden> wrote:
>
> Public bug reported:
>
> The output for the "-cpu help" on the Sparc executables is not
> generating accurate information.
>
> Running
>
> ./qemu-sparc64 -cpu help
>
> produces:
>
> Sparc  Fujitsu Sparc64 IU 0004000200000000 FPU 00000000 MMU 00000000 NWINS 4
> Sparc Fujitsu Sparc64 III IU 0004000300000000 FPU 00000000 MMU 00000000 NWINS 
> 5
> Sparc Fujitsu Sparc64 IV IU 0004000400000000 FPU 00000000 MMU 00000000 NWINS 8
> Sparc Fujitsu Sparc64 V IU 0004000551000000 FPU 00000000 MMU 00000000 NWINS 8
> Sparc  TI UltraSparc I IU 0017001040000000 FPU 00000000 MMU 00000000 NWINS 8
> Sparc TI UltraSparc II IU 0017001120000000 FPU 00000000 MMU 00000000 NWINS 8
> Sparc TI UltraSparc IIi IU 0017001291000000 FPU 00000000 MMU 00000000 NWINS 8
> Sparc TI UltraSparc IIe IU 0017001314000000 FPU 00000000 MMU 00000000 NWINS 8
> Sparc Sun UltraSparc III IU 003e001434000000 FPU 00000000 MMU 00000000 NWINS 8
> Sparc Sun UltraSparc III Cu IU 003e001541000000 FPU 00000000 MMU 00000001 
> NWINS 8
> Sparc Sun UltraSparc IIIi IU 003e001634000000 FPU 00000000 MMU 00000000 NWINS 
> 8
> Sparc Sun UltraSparc IV IU 003e001831000000 FPU 00000000 MMU 00000002 NWINS 8
> Sparc Sun UltraSparc IV+ IU 003e001922000000 FPU 00000000 MMU 00000000 NWINS 
> 8 +cmt
> Sparc Sun UltraSparc IIIi+ IU 003e002200000000 FPU 00000000 MMU 00000001 
> NWINS 8
> Sparc Sun UltraSparc T1 IU 003e002302000000 FPU 00000000 MMU 00000003 NWINS 8 
> +hypv +cmt +gl
> Sparc Sun UltraSparc T2 IU 003e002402000000 FPU 00000000 MMU 00000003 NWINS 8 
> +hypv +cmt +gl
> Sparc NEC UltraSparc I IU 0022001040000000 FPU 00000000 MMU 00000000 NWINS 8
> Default CPU feature flags (use '-' to remove): float swap mul div flush fsqrt 
> fmul vis1 vis2 fsmuld
> Available CPU feature flags (use '+' to add): float128 hypv cmt gl
> Numerical features (use '=' to set): iu_version fpu_version mmu_version 
> nwindows
>
> The entries appear to supposed to be (partial list from source code):
>
> TI-SuperSparc-II
> TI-SuperSparc-II
> TI-SuperSparc-II
> TI-MicroSparc-I
> TI-MicroSparc-I
> TI-MicroSparc-I
> Sun-UltraSparc-T1
> TI-UltraSparc-IIi
> Sun-UltraSparc-T1
>
The T1 entries are in the list above. The Micro- and Super- SPARC
entries are not supposed to be there because they are 32 bit CPUs and
thus not compatible with qemu-sparc64.
Works as designed.

Regards,
Artyom