Re: [Qemu-devel] [PATCH v9 50/84] target/mips: Add updating BadInstr, BadInstrP, BadInstrX for nanoMIPS

[Richard Henderson]

On 08/16/2018 07:57 AM, Aleksandar Markovic wrote:
> +        if ((env->CP0_Config3 & (1 << CP0C3_BP)) &&
> +            (env->hflags & MIPS_HFLAG_BMASK)) {
> +            if (!(env->hflags & MIPS_HFLAG_B16)) {
> +                env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC - 
> 4);
> +            } else {
> +                env->CP0_BadInstrP =
> +                    (cpu_lduw_code(env, env->active_tc.PC - 2)) << 16;
> +            }

Does BadInstrP really make sense for nanomips?  I do still see it in the
documentation, but I thought that was all about the branch delay slot, which is
no longer present.

Patch 39 began avoiding the set of BMASK.  So you can no longer rely on it
here.  Do we need a different mechanism to support BadInstrP, or do we really
need to keep BMASK?


r~