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[Qemu-devel] [PULL 25/30] target/arm: Ignore float_flag_input_denormal f
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 25/30] target/arm: Ignore float_flag_input_denormal from fp_status_f16 |
Date: |
Thu, 16 Aug 2018 14:34:33 +0100 |
From: Richard Henderson <address@hidden>
When FZ is set, input_denormal exceptions are recognized, but this does
not happen with FZ16. The softfloat code has no way to distinguish
these bits and will raise such exceptions into fp_status_f16.flags,
so ignore them when computing the accumulated flags.
Cc: address@hidden (3.0.1)
Reported-by: Laurent Desnogues <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
Reviewed-by: Laurent Desnogues <address@hidden>
Tested-by: Laurent Desnogues <address@hidden>
Message-id: address@hidden
Signed-off-by: Peter Maydell <address@hidden>
---
target/arm/helper.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 0fc6d2e2139..a3124082a63 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -11312,9 +11312,13 @@ uint32_t HELPER(vfp_get_fpscr)(CPUARMState *env)
fpscr = (env->vfp.xregs[ARM_VFP_FPSCR] & 0xffc8ffff)
| (env->vfp.vec_len << 16)
| (env->vfp.vec_stride << 20);
+
i = get_float_exception_flags(&env->vfp.fp_status);
i |= get_float_exception_flags(&env->vfp.standard_fp_status);
- i |= get_float_exception_flags(&env->vfp.fp_status_f16);
+ /* FZ16 does not generate an input denormal exception. */
+ i |= (get_float_exception_flags(&env->vfp.fp_status_f16)
+ & ~float_flag_input_denormal);
+
fpscr |= vfp_exceptbits_from_host(i);
return fpscr;
}
--
2.18.0
- [Qemu-devel] [PULL 09/30] i.MX6UL: Add i.MX6UL SOC, (continued)
- [Qemu-devel] [PULL 09/30] i.MX6UL: Add i.MX6UL SOC, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 11/30] hw/arm: make bitbanded IO optional on ARMv7-M, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 13/30] loader: extract rom_free() function, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 14/30] loader: add rom transaction API, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 16/30] Add QTest testcase for the Intel Hexadecimal, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 20/30] aspeed_sdmc: Set 'cache initial sequence' always true, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 21/30] aspeed_sdmc: Init status always idle, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 12/30] target/arm: add "cortex-m0" CPU model, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 01/30] target/arm: Fix typo in helper_sve_ld1hss_r, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 22/30] aspeed_sdmc: Handle ECC training, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 25/30] target/arm: Ignore float_flag_input_denormal from fp_status_f16,
Peter Maydell <=
- [Qemu-devel] [PULL 17/30] imx_spi: Unset XCH when TX FIFO becomes empty, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 24/30] target/arm: Adjust FPCR_MASK for FZ16, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 23/30] aspeed: add a max_ram_size property to the memory controller, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 15/30] loader: Implement .hex file loader, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 18/30] aspeed_sdmc: Extend number of valid registers, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 19/30] aspeed_sdmc: Fix saved values, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 26/30] target/arm: Use fp_status_fp16 for do_fmpa_zpzzz_h, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 27/30] target/arm: Use FZ not FZ16 for SVE FCVT single-half and double-half, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 29/30] softfloat: Fix missing inexact for floating-point add, Peter Maydell, 2018/08/16
- [Qemu-devel] [PULL 30/30] hw/arm/mps2-tz: Replace init_sysbus_child() with sysbus_init_child_obj(), Peter Maydell, 2018/08/16