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[Qemu-devel] [PATCH v5 11/76] target/mips: Add preprocessor constants fo
From: |
Aleksandar Markovic |
Subject: |
[Qemu-devel] [PATCH v5 11/76] target/mips: Add preprocessor constants for nanoMIPS |
Date: |
Mon, 30 Jul 2018 18:11:44 +0200 |
From: Aleksandar Markovic <address@hidden>
Add ISA_NANOMIPS32 and CPU_NANOMIPS32 preprocessor constants.
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Yongbok Kim <address@hidden>
Signed-off-by: Aleksandar Markovic <address@hidden>
Signed-off-by: Stefan Markovic <address@hidden>
---
target/mips/mips-defs.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h
index d239069..c8e9979 100644
--- a/target/mips/mips-defs.h
+++ b/target/mips/mips-defs.h
@@ -39,6 +39,7 @@
#define ISA_MIPS64R5 0x00001000
#define ISA_MIPS32R6 0x00002000
#define ISA_MIPS64R6 0x00004000
+#define ISA_NANOMIPS32 0x00008000
/* MIPS ASEs. */
#define ASE_MIPS16 0x00010000
@@ -87,6 +88,9 @@
#define CPU_MIPS32R6 (CPU_MIPS32R5 | ISA_MIPS32R6)
#define CPU_MIPS64R6 (CPU_MIPS64R5 | CPU_MIPS32R6 | ISA_MIPS64R6)
+/* Wave Computing: "nanoMIPS" */
+#define CPU_NANOMIPS32 (CPU_MIPS32R6 | ISA_NANOMIPS32)
+
/* Strictly follow the architecture standard:
- Disallow "special" instruction handling for PMON/SPIM.
Note that we still maintain Count/Compare to match the host clock. */
--
2.7.4
- [Qemu-devel] [PATCH v5 04/76] target/mips: Add CP0 BadInstrX register, (continued)
- [Qemu-devel] [PATCH v5 04/76] target/mips: Add CP0 BadInstrX register, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 05/76] target/mips: Don't update BadVAddr register in Debug Mode, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 06/76] target/mips: Check ELPA flag only in some cases of MFHC0 and MTHC0, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 07/76] elf: Remove duplicate preprocessor constant definition, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 08/76] elf: Add ELF flags for MIPS machine variants, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 09/76] linux-user: Update MIPS syscall numbers up to kernel 4.18 headers, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 10/76] linux-user: Add preprocessor availability control to some syscalls, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 11/76] target/mips: Add preprocessor constants for nanoMIPS,
Aleksandar Markovic <=
- [Qemu-devel] [PATCH v5 12/76] target/mips: Add nanoMIPS base instruction set opcodes, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 13/76] target/mips: Add nanoMIPS DSP ASE opcodes, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 14/76] target/mips: Add gen_op_addr_addi(), Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 15/76] target/mips: Fix two instances of shadow variables, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 16/76] target/mips: Mark switch fallthroughs with interpretable comments, Aleksandar Markovic, 2018/07/30
- [Qemu-devel] [PATCH v5 17/76] target/mips: Add placeholder and invocation of decode_nanomips_opc(), Aleksandar Markovic, 2018/07/30