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Re: [Qemu-devel] [RFC PATCH 4/6] cadence_uart: add clock/power gating su
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [Qemu-devel] [RFC PATCH 4/6] cadence_uart: add clock/power gating support |
Date: |
Fri, 27 Jul 2018 14:13:25 -0300 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.9.1 |
On 07/27/2018 11:37 AM, Damien Hedde wrote:
> Only discard input characters when unpowered/unclocked.
> As it is a sysbus device, mmio are already disabled when unpowered
> or unclocked.
This is common to all Chardev frontends (also Ethernet/CAN devices, see
NetClientInfo).
Maybe qemu_chr_fe_accept_input() can take a boolean, so when we disable
a device (power/clock), the char-fe code can discard characters for all
frontends?
>
> Signed-off-by: Damien Hedde <address@hidden>
> ---
> hw/char/cadence_uart.c | 25 ++++++++++++++++++++++++-
> 1 file changed, 24 insertions(+), 1 deletion(-)
>
> diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
> index fbdbd463bb..dd51d9a087 100644
> --- a/hw/char/cadence_uart.c
> +++ b/hw/char/cadence_uart.c
> @@ -335,8 +335,14 @@ static void uart_write_tx_fifo(CadenceUARTState *s,
> const uint8_t *buf,
> static void uart_receive(void *opaque, const uint8_t *buf, int size)
> {
> CadenceUARTState *s = opaque;
> + DeviceState *dev = DEVICE(s);
> uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
>
> + /* ignore characters if unpowered or unclocked */
> + if (!dev->powered || !dev->clocked) {
> + return;
> + }
> +
> if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
> uart_write_rx_fifo(opaque, buf, size);
> }
> @@ -348,8 +354,14 @@ static void uart_receive(void *opaque, const uint8_t
> *buf, int size)
> static void uart_event(void *opaque, int event)
> {
> CadenceUARTState *s = opaque;
> + DeviceState *dev = DEVICE(s);
> uint8_t buf = '\0';
>
> + /* ignore event if we're unpowered or unclocked */
> + if (!dev->powered || !dev->clocked) {
> + return;
> + }
> +
> if (event == CHR_EVENT_BREAK) {
> uart_write_rx_fifo(opaque, &buf, 1);
> }
> @@ -516,10 +528,19 @@ static int cadence_uart_post_load(void *opaque, int
> version_id)
> return 0;
> }
>
> +static int cadence_uart_pre_load(void *opaque)
> +{
> + DeviceState *s = opaque;
> + s->clocked = true;
> + s->powered = true;
> + return 0;
> +}
> +
> static const VMStateDescription vmstate_cadence_uart = {
> .name = "cadence_uart",
> - .version_id = 2,
> + .version_id = 3,
> .minimum_version_id = 2,
> + .pre_load = cadence_uart_pre_load,
> .post_load = cadence_uart_post_load,
> .fields = (VMStateField[]) {
> VMSTATE_UINT32_ARRAY(r, CadenceUARTState, CADENCE_UART_R_MAX),
> @@ -531,6 +552,8 @@ static const VMStateDescription vmstate_cadence_uart = {
> VMSTATE_UINT32(tx_count, CadenceUARTState),
> VMSTATE_UINT32(rx_wpos, CadenceUARTState),
> VMSTATE_TIMER_PTR(fifo_trigger_handle, CadenceUARTState),
> + VMSTATE_BOOL_V(powered, DeviceState, 3),
> + VMSTATE_BOOL_V(clocked, DeviceState, 3),
> VMSTATE_END_OF_LIST()
> }
> };
>
- [Qemu-devel] [RFC PATCH 0/6] Clock and power gating support, Damien Hedde, 2018/07/27
- [Qemu-devel] [RFC PATCH 3/6] sysbus: Specialize gating_update to enable/disable memory regions, Damien Hedde, 2018/07/27
- [Qemu-devel] [RFC PATCH 6/6] xilinx_zynq: add uart clock gating support, Damien Hedde, 2018/07/27
- [Qemu-devel] [RFC PATCH 2/6] qdev: add power/clock gating control on bus tree, Damien Hedde, 2018/07/27
- [Qemu-devel] [RFC PATCH 4/6] cadence_uart: add clock/power gating support, Damien Hedde, 2018/07/27
- Re: [Qemu-devel] [RFC PATCH 4/6] cadence_uart: add clock/power gating support,
Philippe Mathieu-Daudé <=
- [Qemu-devel] [RFC PATCH 5/6] zynq_slcr: add uart clock gating and soft reset support, Damien Hedde, 2018/07/27
- [Qemu-devel] [RFC PATCH 1/6] qdev: add a power and clock gating support, Damien Hedde, 2018/07/27
- Re: [Qemu-devel] [RFC PATCH 0/6] Clock and power gating support, Peter Maydell, 2018/07/27