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Re: [Qemu-devel] [PATCH] hw/sd/bcm2835_sdhost: Fix PIO mode writes


From: Peter Maydell
Subject: Re: [Qemu-devel] [PATCH] hw/sd/bcm2835_sdhost: Fix PIO mode writes
Date: Thu, 19 Jul 2018 11:38:30 +0100

On 16 July 2018 at 23:23, Guenter Roeck <address@hidden> wrote:
> Writes in PIO mode have two requirements:
>
> - A data interrupt must be generated after a write command has been
>   issued to indicate that the chip is ready to receive data.
> - A block interrupt must be generated after each block to indicate
>   that the chip is ready to receive the next data block.
>
> Rearrange the code to make this happen. Tested on raspi3 (in PIO mode)
> and raspi2 (in DMA mode).
>
> Signed-off-by: Guenter Roeck <address@hidden>
> ---

As you say, all still a bit guesswork, but this doesn't break
my previously-working raspi3 kernel and it looks plausible
(especially the separation of "is_read" and "is_write" rather
than assuming everything not a read is a write). Applied
to target-arm.next for the next 3.0 rc.

thanks
-- PMM



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