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Re: [Qemu-devel] [PATCH 1/6] accel/tcg: Pass read access type through to
From: |
Richard Henderson |
Subject: |
Re: [Qemu-devel] [PATCH 1/6] accel/tcg: Pass read access type through to io_readx() |
Date: |
Tue, 10 Jul 2018 11:19:07 -0700 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.8.0 |
On 07/10/2018 09:00 AM, Peter Maydell wrote:
> The io_readx() function needs to know whether the load it is
> doing is an MMU_DATA_LOAD or an MMU_INST_FETCH, so that it
> can pass the right value to the cpu_transaction_failed()
> function. Plumb this information through from the softmmu
> code.
>
> This is currently not often going to give the wrong answer,
> because usually instruction fetches go via get_page_addr_code().
> However once we switch over to handling execution from non-RAM by
> creating single-insn TBs, the path for an insn fetch to generate
> a bus error will be through cpu_ld*_code() and io_readx(),
> so without this change we will generate a d-side fault when we
> should generate an i-side fault.
>
> We also have to pass the access type via a CPU struct global
> down to unassigned_mem_read(), for the benefit of the targets
> which still use the cpu_unassigned_access() hook (m68k, mips,
> sparc, xtensa).
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> accel/tcg/softmmu_template.h | 11 +++++++----
> include/qom/cpu.h | 6 ++++++
> accel/tcg/cputlb.c | 5 +++--
> memory.c | 3 ++-
> 4 files changed, 18 insertions(+), 7 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- [Qemu-devel] [PATCH 0/6] accel/tcg: Support execution from MMIO and small MMU regions, Peter Maydell, 2018/07/10
- [Qemu-devel] [PATCH 2/6] accel/tcg: Handle get_page_addr_code() returning -1 in hashtable lookups, Peter Maydell, 2018/07/10
- [Qemu-devel] [PATCH 1/6] accel/tcg: Pass read access type through to io_readx(), Peter Maydell, 2018/07/10
- [Qemu-devel] [PATCH 3/6] accel/tcg: Handle get_page_addr_code() returning -1 in tb_check_watchpoint(), Peter Maydell, 2018/07/10
- [Qemu-devel] [PATCH 4/6] accel/tcg: tb_gen_code(): Create single-insn TB for execution from non-RAM, Peter Maydell, 2018/07/10
- [Qemu-devel] [PATCH 6/6] target/arm: Allow execution from small regions, Peter Maydell, 2018/07/10
- [Qemu-devel] [PATCH 5/6] accel/tcg: Return -1 for execution from MMIO regions in get_page_addr_code(), Peter Maydell, 2018/07/10