Re: [Qemu-devel] [PATCH v4 0/5] Add Icelake CPU model

[no-reply]

Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH v4 0/5] Add Icelake CPU model

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
   fe8d2d5737..8beb8cc64d  master     -> master
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
 t [tag update]            patchew/address@hidden -> patchew/address@hidden
 t [tag update]            patchew/address@hidden -> patchew/address@hidden
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
 * [new tag]               patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
c57219dd66 i386: Add new CPU model Icelake-{Server, Client}
e4b41e6694 i386: Add CPUID bit for WBNOINVD
0d363e4b5a i386: Add CPUID bit for PCONFIG
1f198579c6 i386: Add CPUID bit and feature words for IA32_ARCH_CAPABILITIES MSR
27bdf2a6a2 i386: Add new MSR indices for IA32_PRED_CMD and 
IA32_ARCH_CAPABILITIES

=== OUTPUT BEGIN ===
Checking PATCH 1/5: i386: Add new MSR indices for IA32_PRED_CMD and 
IA32_ARCH_CAPABILITIES...
Checking PATCH 2/5: i386: Add CPUID bit and feature words for 
IA32_ARCH_CAPABILITIES MSR...
Checking PATCH 3/5: i386: Add CPUID bit for PCONFIG...
Checking PATCH 4/5: i386: Add CPUID bit for WBNOINVD...
ERROR: line over 90 characters
#34: FILE: target/i386/cpu.h:698:
+                                                                             
do not invalidate cache */

total: 1 errors, 0 warnings, 16 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 5/5: i386: Add new CPU model Icelake-{Server, Client}...
=== OUTPUT END ===

Test command exited with code: 1


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