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[Qemu-devel] [PATCH 0/6] target/arm SVE updates
From: |
Richard Henderson |
Subject: |
[Qemu-devel] [PATCH 0/6] target/arm SVE updates |
Date: |
Thu, 28 Jun 2018 17:15:32 -0700 |
Patch 1 fixes the SIGFPE that Alex found with --test-sve=3.
Patch 2 fixes a problem pointed out by Laurent, presumably
via inspection.
The rest begin enabling cpu features for -cpu max.
I'm still working on SVE itself, but these are standalone
and perhaps worth merging before softfreeze.
r~
Richard Henderson (6):
target/arm: Fix SVE signed division vs x86 overflow exception
target/arm: Fix SVE system register access checks
target/arm: Prune a57 features from max
target/arm: Prune a15 features from max
target/arm: Add ID_ISAR6
target/arm: Set ISAR bits for -cpu max
target/arm/cpu.h | 1 +
target/arm/cpu.c | 31 +++++++++++++++++--------
target/arm/cpu64.c | 47 ++++++++++++++++++++++++--------------
target/arm/helper.c | 13 +++++------
target/arm/sve_helper.c | 16 +++++++++----
target/arm/translate-a64.c | 5 ++--
6 files changed, 71 insertions(+), 42 deletions(-)
--
2.17.1