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Re: [Qemu-devel] [RFC 6/8] arm: Add UICR/FICR handling to NRF51 SOC
From: |
Stefan Hajnoczi |
Subject: |
Re: [Qemu-devel] [RFC 6/8] arm: Add UICR/FICR handling to NRF51 SOC |
Date: |
Wed, 27 Jun 2018 10:57:44 +0100 |
User-agent: |
Mutt/1.10.0 (2018-05-17) |
On Wed, Jun 27, 2018 at 09:33:49AM +0200, Steffen Görtz wrote:
> This patch maps preallocated user/factory information
> configuration registers to the NRF51 SOC.
> See NRF51 reference manual section 7 and 8.
>
> Signed-off-by: Steffen Görtz <address@hidden>
> ---
> hw/arm/nrf51_soc.c | 174 ++++++++++++++++++++++++++++++-------
> include/hw/arm/nrf51_soc.h | 5 +-
> 2 files changed, 145 insertions(+), 34 deletions(-)
>
> diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
> index e93699a4b0..82e4c2d833 100644
> --- a/hw/arm/nrf51_soc.c
> +++ b/hw/arm/nrf51_soc.c
> @@ -19,7 +19,6 @@
> #include "sysemu/sysemu.h"
> #include "qemu/log.h"
> #include "cpu.h"
> -#include "crypto/random.h"
>
> #include "hw/arm/nrf51_soc.h"
>
> @@ -29,6 +28,9 @@
> #define FICR_BASE 0x10000000
> #define FICR_SIZE 0x100
>
> +#define UICR_BASE 0x10001000
> +#define UICR_SIZE 0x100
This definition is duplicated in your NVMC patch. Please put it in the
nrf51_soc.h header file.
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- [Qemu-devel] [RFC 0/8] arm: Changes to Microbit Board and NRF51 SOC, Steffen Görtz, 2018/06/27
- [Qemu-devel] [RFC 2/8] arm: NRF51 Add unimplemented device for MMIO, Steffen Görtz, 2018/06/27
- [Qemu-devel] [RFC 4/8] arm: NRF51 Calculate peripheral id from base address, Steffen Görtz, 2018/06/27
- [Qemu-devel] [RFC 5/8] arm: Add NRF51 random number generator peripheral, Steffen Görtz, 2018/06/27
- [Qemu-devel] [RFC 3/8] arm: NRF51 create UART in-place, error handling, Steffen Görtz, 2018/06/27
- [Qemu-devel] [RFC 7/8] arm: Add NRF51 SOC non-volatile memory controller, Steffen Görtz, 2018/06/27
- [Qemu-devel] [RFC 1/8] arm: NRF51/Microbit Memory container and SOC variants, Steffen Görtz, 2018/06/27
- [Qemu-devel] [RFC 8/8] arm: Instantiate NVMC in NRF51., Steffen Görtz, 2018/06/27
- [Qemu-devel] [RFC 6/8] arm: Add UICR/FICR handling to NRF51 SOC, Steffen Görtz, 2018/06/27
- Re: [Qemu-devel] [RFC 6/8] arm: Add UICR/FICR handling to NRF51 SOC,
Stefan Hajnoczi <=
- Re: [Qemu-devel] [RFC 0/8] arm: Changes to Microbit Board and NRF51 SOC, Stefan Hajnoczi, 2018/06/27