qemu-devel
[Top][All Lists]
Advanced

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-devel] [PATCH v2 3/5] ppx/xics: introduce a parent_reset in IC


From: David Gibson
Subject: Re: [Qemu-devel] [PATCH v2 3/5] ppx/xics: introduce a parent_reset in ICSStateClass
Date: Tue, 26 Jun 2018 12:25:46 +1000
User-agent: Mutt/1.10.0 (2018-05-17)

On Mon, Jun 25, 2018 at 11:17:16AM +0200, Cédric Le Goater wrote:
> Just like for the realize handlers, this makes possible to move the
> common ICSState code of the reset handlers in the ics-base class.
> 
> Signed-off-by: Cédric Le Goater <address@hidden>

Applied, thanks.

> ---
>  include/hw/ppc/xics.h |  1 +
>  hw/intc/xics.c        | 45 ++++++++++++++++++++++++++++++---------------
>  hw/intc/xics_kvm.c    | 26 ++++++++++----------------
>  3 files changed, 41 insertions(+), 31 deletions(-)
> 
> diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
> index 44e96e640070..6ac8a9392da6 100644
> --- a/include/hw/ppc/xics.h
> +++ b/include/hw/ppc/xics.h
> @@ -116,6 +116,7 @@ struct ICSStateClass {
>      DeviceClass parent_class;
>  
>      DeviceRealize parent_realize;
> +    DeviceReset parent_reset;
>  
>      void (*pre_save)(ICSState *s);
>      int (*post_load)(ICSState *s, int version_id);
> diff --git a/hw/intc/xics.c b/hw/intc/xics.c
> index 83340770f7c0..8cfe2231531e 100644
> --- a/hw/intc/xics.c
> +++ b/hw/intc/xics.c
> @@ -537,23 +537,16 @@ static void ics_simple_eoi(ICSState *ics, uint32_t nr)
>      }
>  }
>  
> -static void ics_simple_reset(void *dev)
> +static void ics_simple_reset(DeviceState *dev)
>  {
> -    ICSState *ics = ICS_SIMPLE(dev);
> -    int i;
> -    uint8_t flags[ics->nr_irqs];
> +    ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
>  
> -    for (i = 0; i < ics->nr_irqs; i++) {
> -        flags[i] = ics->irqs[i].flags;
> -    }
> -
> -    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
> +    icsc->parent_reset(dev);
> +}
>  
> -    for (i = 0; i < ics->nr_irqs; i++) {
> -        ics->irqs[i].priority = 0xff;
> -        ics->irqs[i].saved_priority = 0xff;
> -        ics->irqs[i].flags = flags[i];
> -    }
> +static void ics_simple_reset_handler(void *dev)
> +{
> +    ics_simple_reset(dev);
>  }
>  
>  static int ics_simple_dispatch_pre_save(void *opaque)
> @@ -625,7 +618,7 @@ static void ics_simple_realize(DeviceState *dev, Error 
> **errp)
>  
>      ics->qirqs = qemu_allocate_irqs(ics_simple_set_irq, ics, ics->nr_irqs);
>  
> -    qemu_register_reset(ics_simple_reset, ics);
> +    qemu_register_reset(ics_simple_reset_handler, ics);
>  }
>  
>  static void ics_simple_class_init(ObjectClass *klass, void *data)
> @@ -635,6 +628,8 @@ static void ics_simple_class_init(ObjectClass *klass, 
> void *data)
>  
>      device_class_set_parent_realize(dc, ics_simple_realize,
>                                      &isc->parent_realize);
> +    device_class_set_parent_reset(dc, ics_simple_reset,
> +                                  &isc->parent_reset);
>  
>      dc->vmsd = &vmstate_ics_simple;
>      isc->reject = ics_simple_reject;
> @@ -650,6 +645,25 @@ static const TypeInfo ics_simple_info = {
>      .class_size = sizeof(ICSStateClass),
>  };
>  
> +static void ics_base_reset(DeviceState *dev)
> +{
> +    ICSState *ics = ICS_BASE(dev);
> +    int i;
> +    uint8_t flags[ics->nr_irqs];
> +
> +    for (i = 0; i < ics->nr_irqs; i++) {
> +        flags[i] = ics->irqs[i].flags;
> +    }
> +
> +    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
> +
> +    for (i = 0; i < ics->nr_irqs; i++) {
> +        ics->irqs[i].priority = 0xff;
> +        ics->irqs[i].saved_priority = 0xff;
> +        ics->irqs[i].flags = flags[i];
> +    }
> +}
> +
>  static void ics_base_realize(DeviceState *dev, Error **errp)
>  {
>      ICSState *ics = ICS_BASE(dev);
> @@ -689,6 +703,7 @@ static void ics_base_class_init(ObjectClass *klass, void 
> *data)
>  
>      dc->realize = ics_base_realize;
>      dc->props = ics_base_properties;
> +    dc->reset = ics_base_reset;
>  }
>  
>  static const TypeInfo ics_base_info = {
> diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
> index 1f27eb497981..b314eb7d1607 100644
> --- a/hw/intc/xics_kvm.c
> +++ b/hw/intc/xics_kvm.c
> @@ -324,25 +324,18 @@ static void ics_kvm_set_irq(void *opaque, int srcno, 
> int val)
>      }
>  }
>  
> -static void ics_kvm_reset(void *dev)
> +static void ics_kvm_reset(DeviceState *dev)
>  {
> -    ICSState *ics = ICS_SIMPLE(dev);
> -    int i;
> -    uint8_t flags[ics->nr_irqs];
> -
> -    for (i = 0; i < ics->nr_irqs; i++) {
> -        flags[i] = ics->irqs[i].flags;
> -    }
> +    ICSStateClass *icsc = ICS_BASE_GET_CLASS(dev);
>  
> -    memset(ics->irqs, 0, sizeof(ICSIRQState) * ics->nr_irqs);
> +    icsc->parent_reset(dev);
>  
> -    for (i = 0; i < ics->nr_irqs; i++) {
> -        ics->irqs[i].priority = 0xff;
> -        ics->irqs[i].saved_priority = 0xff;
> -        ics->irqs[i].flags = flags[i];
> -    }
> +    ics_set_kvm_state(ICS_KVM(dev), 1);
> +}
>  
> -    ics_set_kvm_state(ics, 1);
> +static void ics_kvm_reset_handler(void *dev)
> +{
> +    ics_kvm_reset(dev);
>  }
>  
>  static void ics_kvm_realize(DeviceState *dev, Error **errp)
> @@ -358,7 +351,7 @@ static void ics_kvm_realize(DeviceState *dev, Error 
> **errp)
>      }
>      ics->qirqs = qemu_allocate_irqs(ics_kvm_set_irq, ics, ics->nr_irqs);
>  
> -    qemu_register_reset(ics_kvm_reset, ics);
> +    qemu_register_reset(ics_kvm_reset_handler, ics);
>  }
>  
>  static void ics_kvm_class_init(ObjectClass *klass, void *data)
> @@ -371,6 +364,7 @@ static void ics_kvm_class_init(ObjectClass *klass, void 
> *data)
>       * directly from ics-base and not from ics-simple anymore.
>       */
>      dc->realize = ics_kvm_realize;
> +    dc->reset = ics_kvm_reset;
>  
>      icsc->pre_save = ics_get_kvm_state;
>      icsc->post_load = ics_set_kvm_state;

-- 
David Gibson                    | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
                                | _way_ _around_!
http://www.ozlabs.org/~dgibson

Attachment: signature.asc
Description: PGP signature


reply via email to

[Prev in Thread] Current Thread [Next in Thread]