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[Qemu-devel] [PULL 02/43] hw/arm/mps2-tz: Put ethernet controller behind
From: |
Peter Maydell |
Subject: |
[Qemu-devel] [PULL 02/43] hw/arm/mps2-tz: Put ethernet controller behind PPC |
Date: |
Fri, 15 Jun 2018 15:24:40 +0100 |
The ethernet controller in the AN505 MPC FPGA image is behind
the same AHB Peripheral Protection Controller that handles
the graphics and GPIOs. (In the documentation this is clear
in the block diagram but the ethernet controller was omitted
from the table listing devices connected to the PPC.)
The ethernet sits behind AHB PPCEXP0 interface 5. We had
incorrectly claimed that this was a "gpio4", but there are
only 4 GPIOs in this image.
Correct the QEMU model to match the hardware.
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Peter Maydell <address@hidden>
Message-id: address@hidden
---
hw/arm/mps2-tz.c | 32 +++++++++++++++++++++++---------
1 file changed, 23 insertions(+), 9 deletions(-)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c
index 8dc8bfd4ab2..c5ef95e4cc0 100644
--- a/hw/arm/mps2-tz.c
+++ b/hw/arm/mps2-tz.c
@@ -74,12 +74,13 @@ typedef struct {
UnimplementedDeviceState spi[5];
UnimplementedDeviceState i2c[4];
UnimplementedDeviceState i2s_audio;
- UnimplementedDeviceState gpio[5];
+ UnimplementedDeviceState gpio[4];
UnimplementedDeviceState dma[4];
UnimplementedDeviceState gfx;
CMSDKAPBUART uart[5];
SplitIRQ sec_resp_splitter;
qemu_or_irq uart_irq_orgate;
+ DeviceState *lan9118;
} MPS2TZMachineState;
#define TYPE_MPS2TZ_MACHINE "mps2tz"
@@ -224,6 +225,26 @@ static MemoryRegion *make_fpgaio(MPS2TZMachineState *mms,
void *opaque,
return sysbus_mmio_get_region(SYS_BUS_DEVICE(fpgaio), 0);
}
+static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque,
+ const char *name, hwaddr size)
+{
+ SysBusDevice *s;
+ DeviceState *iotkitdev = DEVICE(&mms->iotkit);
+ NICInfo *nd = &nd_table[0];
+
+ /* In hardware this is a LAN9220; the LAN9118 is software compatible
+ * except that it doesn't support the checksum-offload feature.
+ */
+ qemu_check_nic_model(nd, "lan9118");
+ mms->lan9118 = qdev_create(NULL, "lan9118");
+ qdev_set_nic_properties(mms->lan9118, nd);
+ qdev_init_nofail(mms->lan9118);
+
+ s = SYS_BUS_DEVICE(mms->lan9118);
+ sysbus_connect_irq(s, 0, qdev_get_gpio_in_named(iotkitdev, "EXP_IRQ", 16));
+ return sysbus_mmio_get_region(s, 0);
+}
+
static void mps2tz_common_init(MachineState *machine)
{
MPS2TZMachineState *mms = MPS2TZ_MACHINE(machine);
@@ -363,7 +384,7 @@ static void mps2tz_common_init(MachineState *machine)
{ "gpio1", make_unimp_dev, &mms->gpio[1], 0x40101000, 0x1000 },
{ "gpio2", make_unimp_dev, &mms->gpio[2], 0x40102000, 0x1000 },
{ "gpio3", make_unimp_dev, &mms->gpio[3], 0x40103000, 0x1000 },
- { "gpio4", make_unimp_dev, &mms->gpio[4], 0x40104000, 0x1000 },
+ { "eth", make_eth_dev, NULL, 0x42000000, 0x100000 },
},
}, {
.name = "ahb_ppcexp1",
@@ -447,13 +468,6 @@ static void mps2tz_common_init(MachineState *machine)
"cfg_sec_resp", 0));
}
- /* In hardware this is a LAN9220; the LAN9118 is software compatible
- * except that it doesn't support the checksum-offload feature.
- * The ethernet controller is not behind a PPC.
- */
- lan9118_init(&nd_table[0], 0x42000000,
- qdev_get_gpio_in_named(iotkitdev, "EXP_IRQ", 16));
-
create_unimplemented_device("FPGA NS PC", 0x48007000, 0x1000);
armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename, 0x400000);
--
2.17.1
- [Qemu-devel] [PULL 12/43] hw/core/or-irq: Support more than 16 inputs to an OR gate, (continued)
- [Qemu-devel] [PULL 12/43] hw/core/or-irq: Support more than 16 inputs to an OR gate, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 01/43] arm_gicv3_kvm: kvm_dist_get/put_priority: skip the registers banked by GICR_IPRIORITYR, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 14/43] cputlb: Pass cpu_transaction_failed() the correct physaddr, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 21/43] target/arm: Implement SVE Permute - Predicates Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 18/43] exec.c: Use stn_p() and ldn_p() instead of explicit switches, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 19/43] target/arm: Extend vec_reg_offset to larger sizes, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 03/43] hw/sh/sh7750: Convert away from old_mmio, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 20/43] target/arm: Implement SVE Permute - Unpredicated Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 25/43] target/arm: Implement SVE copy to vector (predicated), Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 24/43] target/arm: Implement SVE conditionally broadcast/extract element, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 02/43] hw/arm/mps2-tz: Put ethernet controller behind PPC,
Peter Maydell <=
- [Qemu-devel] [PULL 26/43] target/arm: Implement SVE reverse within elements, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 30/43] target/arm: Implement SVE Integer Compare - Immediate Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 33/43] target/arm: Implement SVE Integer Compare - Scalars Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 34/43] target/arm: Implement FDUP/DUP, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 31/43] target/arm: Implement SVE Partition Break Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 28/43] target/arm: Implement SVE Select Vectors Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 41/43] iommu: Add IOMMU index argument to translate method, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 42/43] exec.c: Handle IOMMUs in address_space_translate_for_iotlb(), Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 22/43] target/arm: Implement SVE Permute - Interleaving Group, Peter Maydell, 2018/06/15
- [Qemu-devel] [PULL 27/43] target/arm: Implement SVE vector splice (predicated), Peter Maydell, 2018/06/15