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Re: [Qemu-devel] [PATCH v2 06/13] hw/misc/tz-mpc.c: Implement registers
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v2 06/13] hw/misc/tz-mpc.c: Implement registers |
Date: |
Fri, 15 Jun 2018 09:59:11 +0100 |
On 14 June 2018 at 21:14, Auger Eric <address@hidden> wrote:
> Hi Peter,
>
> On 06/04/2018 05:29 PM, Peter Maydell wrote:
>> Implement the missing registers for the TZ MPC.
>>
>> Signed-off-by: Peter Maydell <address@hidden>
>> static MemTxResult tz_mpc_reg_read(void *opaque, hwaddr addr,
>> uint64_t *pdata,
>> unsigned size, MemTxAttrs attrs)
>> {
>> + TZMPC *s = TZ_MPC(opaque);
>> uint64_t r;
>> uint32_t offset = addr & ~0x3;
> I don't get where do we check if the access is secure or not. Shouldn't
> we test attrs.secure somewhere (PPROT[1] == 0)? Also the spec says
> IDregs can be read by any type of access. Where is this differentiation
> done?
I'd missed that bit of the spec -- yes, we should be checking
attrs.secure to see if we should allow access to the non-ID registers.
For the MPS2 boards it doesn't matter because the registers are
in a part of the memory map that is enforced as secure-access-only
by the IDAU.
thanks
-- PMM
[Qemu-devel] [PATCH v2 02/13] iommu: Add IOMMU index argument to notifier APIs, Peter Maydell, 2018/06/04
[Qemu-devel] [PATCH v2 11/13] hw/arm/iotkit: Instantiate MPC, Peter Maydell, 2018/06/04
[Qemu-devel] [PATCH v2 13/13] hw/arm/mps2-tz.c: Instantiate MPCs, Peter Maydell, 2018/06/04
[Qemu-devel] [PATCH v2 12/13] hw/arm/iotkit: Wire up MPC interrupt lines, Peter Maydell, 2018/06/04