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[Qemu-devel] [PATCH v2 1/2] target-arm: Add the Cortex-R5F
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v2 1/2] target-arm: Add the Cortex-R5F |
Date: |
Tue, 29 May 2018 14:47:06 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Add the Cortex-R5F with the optional FPU enabled.
Reviewed-by: KONRAD Frederic <address@hidden>
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Tested-by: Philippe Mathieu-Daudé <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/arm/cpu.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 5d60893a07..8ab571e84a 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1343,6 +1343,14 @@ static void cortex_r5_initfn(Object *obj)
define_arm_cp_regs(cpu, cortexr5_cp_reginfo);
}
+static void cortex_r5f_initfn(Object *obj)
+{
+ ARMCPU *cpu = ARM_CPU(obj);
+
+ cortex_r5_initfn(obj);
+ set_feature(&cpu->env, ARM_FEATURE_VFP3);
+}
+
static const ARMCPRegInfo cortexa8_cp_reginfo[] = {
{ .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0,
.access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 },
@@ -1803,6 +1811,7 @@ static const ARMCPUInfo arm_cpus[] = {
{ .name = "cortex-m33", .initfn = cortex_m33_initfn,
.class_init = arm_v7m_class_init },
{ .name = "cortex-r5", .initfn = cortex_r5_initfn },
+ { .name = "cortex-r5f", .initfn = cortex_r5f_initfn },
{ .name = "cortex-a7", .initfn = cortex_a7_initfn },
{ .name = "cortex-a8", .initfn = cortex_a8_initfn },
{ .name = "cortex-a9", .initfn = cortex_a9_initfn },
--
2.14.1