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[Qemu-devel] [PULL v1 06/38] target-microblaze: Correct the PVR array si
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PULL v1 06/38] target-microblaze: Correct the PVR array size |
Date: |
Tue, 29 May 2018 12:49:39 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Correct the PVR array size, there are 13 PVR registers.
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/cpu.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h
index 994496515f..2304c24b7d 100644
--- a/target/microblaze/cpu.h
+++ b/target/microblaze/cpu.h
@@ -277,7 +277,7 @@ struct CPUMBState {
/* These fields are preserved on reset. */
struct {
- uint32_t regs[16];
+ uint32_t regs[13];
} pvr;
};
--
2.14.1
- [Qemu-devel] [PULL v1 00/38] Xilinx queue, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 01/38] target-microblaze: dec_load: Use bool instead of unsigned int, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 03/38] target-microblaze: compute_ldst_addr: Use bool instead of int, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 04/38] target-microblaze: Fallback to our latest CPU version, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 02/38] target-microblaze: dec_store: Use bool instead of unsigned int, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 05/38] target-microblaze: Correct special register array sizes, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 06/38] target-microblaze: Correct the PVR array size,
Edgar E. Iglesias <=
- [Qemu-devel] [PULL v1 09/38] target-microblaze: Conditionalize setting of PVR11_USE_MMU, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 08/38] target-microblaze: Remove USE_MMU PVR checks, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 10/38] target-microblaze: Bypass MMU with MMU_NOMMU_IDX, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 11/38] target-microblaze: Make compute_ldst_addr always use a temp, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 12/38] target-microblaze: Remove pointer indirection for ld/st addresses, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 07/38] target-microblaze: Tighten up TCGv_i32 vs TCGv type usage, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 14/38] target-microblaze: Name special registers we support, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 13/38] target-microblaze: Use TCGv for load/store addresses, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 17/38] target-microblaze: dec_msr: Use bool and extract32, Edgar E. Iglesias, 2018/05/29
- [Qemu-devel] [PULL v1 15/38] target-microblaze: Break out trap_userspace(), Edgar E. Iglesias, 2018/05/29