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Re: [Qemu-devel] [PATCH 4/4] bochs-display: add pcie support

From: Gerd Hoffmann
Subject: Re: [Qemu-devel] [PATCH 4/4] bochs-display: add pcie support
Date: Tue, 22 May 2018 11:33:53 +0200
User-agent: NeoMutt/20180512

On Fri, May 18, 2018 at 05:13:27PM +0200, Marc-André Lureau wrote:
> Hi
> On Thu, May 17, 2018 at 11:25 AM, Gerd Hoffmann <address@hidden> wrote:
> > Signed-off-by: Gerd Hoffmann <address@hidden>
> > ---
> Could you explain where the 0x80 offset comes from?

Pulled out of thin air.  Standard pci cfg space header size is 0x40, so
it must be between 0x40 and 0xff - sizeof(capability).  And it must not
overlap with other pci(e) capabilities (easy as this is the only one).
That are the only constrains I'm aware of.


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