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Re: [Qemu-devel] [PATCH 5/9] target/riscv: Honor CPU_DUMP_FPU
From: |
Michael Clark |
Subject: |
Re: [Qemu-devel] [PATCH 5/9] target/riscv: Honor CPU_DUMP_FPU |
Date: |
Fri, 18 May 2018 14:16:20 +1200 |
On Sun, May 13, 2018 at 12:52 PM, Philippe Mathieu-Daudé <address@hidden>
wrote:
> On 05/11/2018 12:52 AM, Richard Henderson wrote:
> > Cc: Michael Clark <address@hidden>
> > Cc: Palmer Dabbelt <address@hidden>
> > Cc: Sagar Karandikar <address@hidden>
> > Cc: Bastian Koppelmann <address@hidden>
> > Signed-off-by: Richard Henderson <address@hidden>
>
> Reviewed-by: Philippe Mathieu-Daudé <address@hidden>
Reviewed-by: Michael Clark <address@hidden>
> > ---
> > target/riscv/cpu.c | 16 +++++++++++-----
> > 1 file changed, 11 insertions(+), 5 deletions(-)
> >
> > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> > index 4e5a56d4e3..4612f324c9 100644
> > --- a/target/riscv/cpu.c
> > +++ b/target/riscv/cpu.c
> > @@ -199,6 +199,10 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE
> *f,
> > int i;
> >
> > cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "pc ", env->pc);
> > + if (flags & CPU_DUMP_FPU) {
> > + cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "fcsr ",
> > + cpu_riscv_get_fcsr(env));
> > + }
> > #ifndef CONFIG_USER_ONLY
> > cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mhartid ", env->mhartid);
> > cpu_fprintf(f, " %s " TARGET_FMT_lx "\n", "mstatus ", env->mstatus);
> > @@ -219,11 +223,13 @@ static void riscv_cpu_dump_state(CPUState *cs,
> FILE *f,
> > cpu_fprintf(f, "\n");
> > }
> > }
> > - for (i = 0; i < 32; i++) {
> > - cpu_fprintf(f, " %s %016" PRIx64,
> > - riscv_fpr_regnames[i], env->fpr[i]);
> > - if ((i & 3) == 3) {
> > - cpu_fprintf(f, "\n");
> > + if (flags & CPU_DUMP_FPU) {
> > + for (i = 0; i < 32; i++) {
> > + cpu_fprintf(f, " %s %016" PRIx64,
> > + riscv_fpr_regnames[i], env->fpr[i]);
> > + if ((i & 3) == 3) {
> > + cpu_fprintf(f, "\n");
> > + }
> > }
> > }
> > }
> >
>
- Re: [Qemu-devel] [PATCH 1/9] target/alpha: Honor CPU_DUMP_FPU, (continued)
- [Qemu-devel] [PATCH 2/9] target/mips: Honor CPU_DUMP_FPU, Richard Henderson, 2018/05/10
- [Qemu-devel] [PATCH 3/9] target/ppc: Honor CPU_DUMP_FPU, Richard Henderson, 2018/05/10
- [Qemu-devel] [PATCH 4/9] target/riscv: Introduce cpu_riscv_get_fcsr, Richard Henderson, 2018/05/10
- [Qemu-devel] [PATCH 5/9] target/riscv: Honor CPU_DUMP_FPU, Richard Henderson, 2018/05/10
- [Qemu-devel] [PATCH 6/9] target/s390x: Honor CPU_DUMP_FPU, Richard Henderson, 2018/05/10
- [Qemu-devel] [PATCH 9/9] target/xtensa: Honor CPU_DUMP_FPU, Richard Henderson, 2018/05/10
- [Qemu-devel] [PATCH 7/9] target/sparc: Honor CPU_DUMP_FPU, Richard Henderson, 2018/05/10
- [Qemu-devel] [PATCH 8/9] target/unicore32: Honor CPU_DUMP_FPU, Richard Henderson, 2018/05/10