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[Qemu-devel] [PATCH v3 07/12] intel-iommu: trace domain id during page w
From: |
Peter Xu |
Subject: |
[Qemu-devel] [PATCH v3 07/12] intel-iommu: trace domain id during page walk |
Date: |
Thu, 17 May 2018 16:59:22 +0800 |
This patch only modifies the trace points.
Previously we were tracing page walk levels. They are redundant since
we have page mask (size) already. Now we trace something much more
useful which is the domain ID of the page walking. That can be very
useful when we trace more than one devices on the same system, so that
we can know which map is for which domain.
Signed-off-by: Peter Xu <address@hidden>
---
hw/i386/intel_iommu.c | 16 ++++++++++------
hw/i386/trace-events | 2 +-
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index fe5ee77d46..29fcf2b3a8 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -755,6 +755,7 @@ typedef int (*vtd_page_walk_hook)(IOMMUTLBEntry *entry,
void *private);
* @notify_unmap: whether we should notify invalid entries
* @as: VT-d address space of the device
* @aw: maximum address width
+ * @domain: domain ID of the page walk
*/
typedef struct {
VTDAddressSpace *as;
@@ -762,17 +763,18 @@ typedef struct {
void *private;
bool notify_unmap;
uint8_t aw;
+ uint16_t domain_id;
} vtd_page_walk_info;
-static int vtd_page_walk_one(IOMMUTLBEntry *entry, int level,
- vtd_page_walk_info *info)
+static int vtd_page_walk_one(IOMMUTLBEntry *entry, vtd_page_walk_info *info)
{
vtd_page_walk_hook hook_fn = info->hook_fn;
void *private = info->private;
assert(hook_fn);
- trace_vtd_page_walk_one(level, entry->iova, entry->translated_addr,
- entry->addr_mask, entry->perm);
+ trace_vtd_page_walk_one(info->domain_id, entry->iova,
+ entry->translated_addr, entry->addr_mask,
+ entry->perm);
return hook_fn(entry, private);
}
@@ -843,7 +845,7 @@ static int vtd_page_walk_level(dma_addr_t addr, uint64_t
start,
trace_vtd_page_walk_skip_perm(iova, iova_next);
goto next;
}
- ret = vtd_page_walk_one(&entry, level, info);
+ ret = vtd_page_walk_one(&entry, info);
if (ret < 0) {
return ret;
}
@@ -855,7 +857,7 @@ static int vtd_page_walk_level(dma_addr_t addr, uint64_t
start,
* Translated address is meaningless, zero it.
*/
entry.translated_addr = 0x0;
- ret = vtd_page_walk_one(&entry, level, info);
+ ret = vtd_page_walk_one(&entry, info);
if (ret < 0) {
return ret;
}
@@ -1463,6 +1465,7 @@ static void
vtd_iotlb_page_invalidate_notify(IntelIOMMUState *s,
.notify_unmap = true,
.aw = s->aw_bits,
.as = vtd_as,
+ .domain_id = domain_id,
};
/*
@@ -2945,6 +2948,7 @@ static void vtd_iommu_replay(IOMMUMemoryRegion *iommu_mr,
IOMMUNotifier *n)
.notify_unmap = false,
.aw = s->aw_bits,
.as = vtd_as,
+ .domain_id = VTD_CONTEXT_ENTRY_DID(ce.hi),
};
vtd_page_walk(&ce, 0, ~0ULL, &info);
diff --git a/hw/i386/trace-events b/hw/i386/trace-events
index 22d44648af..ca23ba9fad 100644
--- a/hw/i386/trace-events
+++ b/hw/i386/trace-events
@@ -39,7 +39,7 @@ vtd_fault_disabled(void) "Fault processing disabled for
context entry"
vtd_replay_ce_valid(uint8_t bus, uint8_t dev, uint8_t fn, uint16_t domain,
uint64_t hi, uint64_t lo) "replay valid context device
%02"PRIx8":%02"PRIx8".%02"PRIx8" domain 0x%"PRIx16" hi 0x%"PRIx64" lo 0x%"PRIx64
vtd_replay_ce_invalid(uint8_t bus, uint8_t dev, uint8_t fn) "replay invalid
context device %02"PRIx8":%02"PRIx8".%02"PRIx8
vtd_page_walk_level(uint64_t addr, uint32_t level, uint64_t start, uint64_t
end) "walk (base=0x%"PRIx64", level=%"PRIu32") iova range 0x%"PRIx64" -
0x%"PRIx64
-vtd_page_walk_one(uint32_t level, uint64_t iova, uint64_t gpa, uint64_t mask,
int perm) "detected page level 0x%"PRIx32" iova 0x%"PRIx64" -> gpa 0x%"PRIx64"
mask 0x%"PRIx64" perm %d"
+vtd_page_walk_one(uint16_t domain, uint64_t iova, uint64_t gpa, uint64_t mask,
int perm) "domain 0x%"PRIu16" iova 0x%"PRIx64" -> gpa 0x%"PRIx64" mask
0x%"PRIx64" perm %d"
vtd_page_walk_skip_read(uint64_t iova, uint64_t next) "Page walk skip iova
0x%"PRIx64" - 0x%"PRIx64" due to unable to read"
vtd_page_walk_skip_perm(uint64_t iova, uint64_t next) "Page walk skip iova
0x%"PRIx64" - 0x%"PRIx64" due to perm empty"
vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) "Page walk skip iova
0x%"PRIx64" - 0x%"PRIx64" due to rsrv set"
--
2.17.0
- [Qemu-devel] [PATCH v3 01/12] intel-iommu: send PSI always even if across PDEs, (continued)
- [Qemu-devel] [PATCH v3 01/12] intel-iommu: send PSI always even if across PDEs, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 02/12] intel-iommu: remove IntelIOMMUNotifierNode, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 03/12] intel-iommu: add iommu lock, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 04/12] intel-iommu: only do page walk for MAP notifiers, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 05/12] intel-iommu: introduce vtd_page_walk_info, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 06/12] intel-iommu: pass in address space when page walk, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 07/12] intel-iommu: trace domain id during page walk,
Peter Xu <=
- [Qemu-devel] [PATCH v3 08/12] util: implement simple iova tree, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 09/12] intel-iommu: maintain per-device iova ranges, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 10/12] intel-iommu: simplify page walk logic, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 11/12] intel-iommu: new vtd_sync_shadow_page_table_range, Peter Xu, 2018/05/17
- [Qemu-devel] [PATCH v3 12/12] intel-iommu: new sync_shadow_page_table, Peter Xu, 2018/05/17
- Re: [Qemu-devel] [PATCH v3 00/12] intel-iommu: nested vIOMMU, cleanups, bug fixes, Jintack Lim, 2018/05/17