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[Qemu-devel] [PATCH v3 10/38] target-microblaze: Bypass MMU with MMU_NOM
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v3 10/38] target-microblaze: Bypass MMU with MMU_NOMMU_IDX |
Date: |
Wed, 16 May 2018 20:51:18 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Bypass MMU translation when mmu-index MMU_NOMMU_IDX is used.
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/helper.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c
index a9f4ca93e3..261dcc74c7 100644
--- a/target/microblaze/helper.c
+++ b/target/microblaze/helper.c
@@ -58,7 +58,8 @@ int mb_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int
size, int rw,
int prot;
/* Translate if the MMU is available and enabled. */
- if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)) {
+ if (cpu->cfg.use_mmu && (env->sregs[SR_MSR] & MSR_VM)
+ && mmu_idx != MMU_NOMMU_IDX) {
uint32_t vaddr, paddr;
struct microblaze_mmu_lookup lu;
--
2.14.1
- [Qemu-devel] [PATCH v3 02/38] target-microblaze: dec_store: Use bool instead of unsigned int, (continued)
- [Qemu-devel] [PATCH v3 02/38] target-microblaze: dec_store: Use bool instead of unsigned int, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 03/38] target-microblaze: compute_ldst_addr: Use bool instead of int, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 01/38] target-microblaze: dec_load: Use bool instead of unsigned int, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 04/38] target-microblaze: Fallback to our latest CPU version, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 05/38] target-microblaze: Correct special register array sizes, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 08/38] target-microblaze: Remove USE_MMU PVR checks, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 06/38] target-microblaze: Correct the PVR array size, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 09/38] target-microblaze: Conditionalize setting of PVR11_USE_MMU, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 10/38] target-microblaze: Bypass MMU with MMU_NOMMU_IDX,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v3 11/38] target-microblaze: Make compute_ldst_addr always use a temp, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 07/38] target-microblaze: Tighten up TCGv_i32 vs TCGv type usage, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 13/38] target-microblaze: Use TCGv for load/store addresses, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 12/38] target-microblaze: Remove pointer indirection for ld/st addresses, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 14/38] target-microblaze: Name special registers we support, Edgar E. Iglesias, 2018/05/16
- [Qemu-devel] [PATCH v3 15/38] target-microblaze: Break out trap_userspace(), Edgar E. Iglesias, 2018/05/16