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Re: [Qemu-devel] [PATCH v8 7/8] i386: Enable TOPOEXT feature on AMD EPYC
From: |
Eduardo Habkost |
Subject: |
Re: [Qemu-devel] [PATCH v8 7/8] i386: Enable TOPOEXT feature on AMD EPYC CPU |
Date: |
Fri, 11 May 2018 17:46:48 -0300 |
User-agent: |
Mutt/1.9.2 (2017-12-15) |
On Thu, May 10, 2018 at 03:41:47PM -0500, Babu Moger wrote:
> Enable TOPOEXT feature on EPYC CPU. This is required to support
> hyperthreading on VM guests. Also extend xlevel to 0x8000001E.
>
> Signed-off-by: Babu Moger <address@hidden>
> Tested-by: Geoffrey McRae <address@hidden>
> Reviewed-by: Eduardo Habkost <address@hidden>
> ---
> target/i386/cpu.c | 11 +++++++++--
> 1 file changed, 9 insertions(+), 2 deletions(-)
>
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index 5cfc7bb0e1..575f2416a1 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -2382,7 +2382,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .features[FEAT_8000_0001_ECX] =
> CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH |
> CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM |
> - CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
> + CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM |
> + CPUID_EXT3_TOPOEXT,
> .features[FEAT_7_0_EBX] =
> CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AVX2
> |
> CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED |
> @@ -2427,7 +2428,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
> .features[FEAT_8000_0001_ECX] =
> CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH |
> CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM |
> - CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM,
> + CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM |
> + CPUID_EXT3_TOPOEXT,
I forgot about one thing: you'll need to add EPYC.topoext=off and
EPYC-IBPB.topoext=off to PC_COMPAT_2_12.
> .features[FEAT_8000_0008_EBX] =
> CPUID_8000_0008_EBX_IBPB,
> .features[FEAT_7_0_EBX] =
> @@ -4540,6 +4542,11 @@ static void x86_cpu_expand_features(X86CPU *cpu, Error
> **errp)
> x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000000A);
> }
>
> + /* TOPOEXT feature requires 0x8000001E */
> + if (env->features[FEAT_8000_0001_ECX] & CPUID_EXT3_TOPOEXT) {
> + x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001E);
> + }
> +
> /* SEV requires CPUID[0x8000001F] */
> if (sev_enabled()) {
> x86_cpu_adjust_level(cpu, &env->cpuid_min_xlevel, 0x8000001F);
> --
> 2.17.0
>
>
--
Eduardo
- [Qemu-devel] [PATCH v8 0/8] i386: Enable TOPOEXT to support hyperthreading on AMD CPU, Babu Moger, 2018/05/10
- [Qemu-devel] [PATCH v8 2/8] i386: Add cache information in X86CPUDefinition, Babu Moger, 2018/05/10
- [Qemu-devel] [PATCH v8 4/8] i386: Initialize cache information for EPYC family processors, Babu Moger, 2018/05/10
- [Qemu-devel] [PATCH v8 7/8] i386: Enable TOPOEXT feature on AMD EPYC CPU, Babu Moger, 2018/05/10
- Re: [Qemu-devel] [PATCH v8 7/8] i386: Enable TOPOEXT feature on AMD EPYC CPU,
Eduardo Habkost <=
- [Qemu-devel] [PATCH v8 5/8] i386: Populate AMD Processor Cache Information for cpuid 0x8000001D, Babu Moger, 2018/05/10
- [Qemu-devel] [PATCH v8 6/8] i386: Add support for CPUID_8000_001E for AMD, Babu Moger, 2018/05/10
- [Qemu-devel] [PATCH v8 1/8] i386: Helpers to encode cache information consistently, Babu Moger, 2018/05/10
- [Qemu-devel] [PATCH v8 3/8] i386: Add new property to control cache info, Babu Moger, 2018/05/10