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Re: [Qemu-devel] [PATCH v3 04/10] tcg: Introduce atomic helpers for inte
From: |
Peter Maydell |
Subject: |
Re: [Qemu-devel] [PATCH v3 04/10] tcg: Introduce atomic helpers for integer min/max |
Date: |
Tue, 8 May 2018 18:49:00 +0100 |
On 8 May 2018 at 18:37, Peter Maydell <address@hidden> wrote:
> On 8 May 2018 at 16:14, Richard Henderson <address@hidden> wrote:
>> Given that this atomic operation will be used by both risc-v
>> and aarch64, let's not duplicate code across the two targets.
>>
>> Reviewed-by: Peter Maydell <address@hidden>
>> Signed-off-by: Richard Henderson <address@hidden>
>> ---
>> accel/tcg/atomic_template.h | 71 +++++++++++++++++++++++++++++++++++++
>> accel/tcg/tcg-runtime.h | 8 +++++
>> tcg/tcg-op.h | 34 ++++++++++++++++++
>> tcg/tcg.h | 8 +++++
>> tcg/tcg-op.c | 8 +++++
>> 5 files changed, 129 insertions(+)
>>
>> diff --git a/accel/tcg/atomic_template.h b/accel/tcg/atomic_template.h
>> index e022df4571..2489dd3ec1 100644
>> --- a/accel/tcg/atomic_template.h
>> +++ b/accel/tcg/atomic_template.h
>> @@ -25,18 +25,22 @@
>> #elif DATA_SIZE == 8
>> # define SUFFIX q
>> # define DATA_TYPE uint64_t
>> +# define SDATA_TYPE int64_t
>> # define BSWAP bswap64
>> #elif DATA_SIZE == 4
>> # define SUFFIX l
>> # define DATA_TYPE uint32_t
>> +# define SDATA_TYPE int32_t
>> # define BSWAP bswap32
>> #elif DATA_SIZE == 2
>> # define SUFFIX w
>> # define DATA_TYPE uint16_t
>> +# define SDATA_TYPE int16_t
>> # define BSWAP bswap16
>> #elif DATA_SIZE == 1
>> # define SUFFIX b
>> # define DATA_TYPE uint8_t
>> +# define SDATA_TYPE int8_t
>> # define BSWAP
>> #else
>> # error unsupported data size
>> @@ -118,6 +122,39 @@ GEN_ATOMIC_HELPER(or_fetch)
>> GEN_ATOMIC_HELPER(xor_fetch)
>>
>> #undef GEN_ATOMIC_HELPER
>> +
>> +/* These helpers are, as a whole, full barriers. Within the helper,
>> + * the leading barrier is explicit and the trailing barrier is within
>> + * cmpxchg primitive.
>> + */
>> +#define GEN_ATOMIC_HELPER_FN(X, FN, XDATA_TYPE, RET) \
>> +ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
>> + ABI_TYPE xval EXTRA_ARGS) \
>> +{ \
>> + ATOMIC_MMU_DECLS; \
>> + XDATA_TYPE *haddr = ATOMIC_MMU_LOOKUP; \
>> + XDATA_TYPE cmp, old, new, val = xval; \
>> + smp_mb(); \
>> + cmp = atomic_read__nocheck(haddr); \
>> + do { \
>> + old = cmp; new = FN(old, val); \
>> + cmp = atomic_cmpxchg__nocheck(haddr, old, new); \
>> + } while (cmp != old); \
>> + ATOMIC_MMU_CLEANUP; \
>> + return RET; \
>> +}
>> +
>> +GEN_ATOMIC_HELPER_FN(fetch_smin, MIN, SDATA_TYPE, old)
>> +GEN_ATOMIC_HELPER_FN(fetch_umin, MIN, DATA_TYPE, old)
>> +GEN_ATOMIC_HELPER_FN(fetch_smax, MAX, SDATA_TYPE, old)
>> +GEN_ATOMIC_HELPER_FN(fetch_umax, MAX, DATA_TYPE, old)
>> +
>> +GEN_ATOMIC_HELPER_FN(smin_fetch, MIN, SDATA_TYPE, new)
>> +GEN_ATOMIC_HELPER_FN(umin_fetch, MIN, DATA_TYPE, new)
>> +GEN_ATOMIC_HELPER_FN(smax_fetch, MAX, SDATA_TYPE, new)
>> +GEN_ATOMIC_HELPER_FN(umax_fetch, MAX, DATA_TYPE, new)
>
> This fails to compile for me:
Running it not via ccache gave me some more detail (??):
In file included from
/home/petmay01/linaro/qemu-from-laptop/qemu/accel/tcg/cputlb.c:22:0:
/home/petmay01/linaro/qemu-from-laptop/qemu/accel/tcg/atomic_template.h:
In function ‘helper_atomic_fetch_sminb_mmu’:
/home/petmay01/linaro/qemu-from-laptop/qemu/target/arm/cpu.h:36:29:
error: value computed is not used [-Werror=unused-value]
#define CPUArchState struct CPUARMState
^
/home/petmay01/linaro/qemu-from-laptop/qemu/accel/tcg/atomic_template.h:131:25:
note: in expansion of macro ‘CPUArchState’
ABI_TYPE ATOMIC_NAME(X)(CPUArchState *env, target_ulong addr, \
^
/home/petmay01/linaro/qemu-from-laptop/qemu/accel/tcg/atomic_template.h:147:1:
note: in expansion of macro ‘GEN_ATOMIC_HELPER_FN’
GEN_ATOMIC_HELPER_FN(fetch_smin, MIN, SDATA_TYPE, old)
^
though that doesn't make much sense either. I'll see if
I can get gcc to show me the macros-expanded code.
thanks
-- PMM
- [Qemu-devel] [PATCH v3 00/10] target/arm: Implement v8.1-Atomics, Richard Henderson, 2018/05/08
- [Qemu-devel] [PATCH v3 01/10] tcg: Introduce helpers for integer min/max, Richard Henderson, 2018/05/08
- [Qemu-devel] [PATCH v3 03/10] target/xtensa: Use new min/max expanders, Richard Henderson, 2018/05/08
- [Qemu-devel] [PATCH v3 02/10] target/arm: Use new min/max expanders, Richard Henderson, 2018/05/08
- [Qemu-devel] [PATCH v3 05/10] tcg: Use GEN_ATOMIC_HELPER_FN for opposite endian atomic add, Richard Henderson, 2018/05/08
- [Qemu-devel] [PATCH v3 04/10] tcg: Introduce atomic helpers for integer min/max, Richard Henderson, 2018/05/08
[Qemu-devel] [PATCH v3 08/10] target/arm: Fill in disas_ldst_atomic, Richard Henderson, 2018/05/08
[Qemu-devel] [PATCH v3 06/10] target/riscv: Use new atomic min/max expanders, Richard Henderson, 2018/05/08
[Qemu-devel] [PATCH v3 10/10] target/arm: Enable ARM_FEATURE_V8_ATOMICS for user-only, Richard Henderson, 2018/05/08
[Qemu-devel] [PATCH v3 09/10] target/arm: Implement CAS and CASP, Richard Henderson, 2018/05/08
[Qemu-devel] [PATCH v3 07/10] target/arm: Introduce ARM_FEATURE_V8_ATOMICS and initial decode, Richard Henderson, 2018/05/08
Re: [Qemu-devel] [PATCH v3 00/10] target/arm: Implement v8.1-Atomics, no-reply, 2018/05/08