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[Qemu-devel] [PATCH v2 27/36] target-microblaze: mmu: Add a configurable
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v2 27/36] target-microblaze: mmu: Add a configurable output address mask |
Date: |
Tue, 8 May 2018 19:31:43 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Add a configurable output address mask, used to mimic the
configurable physical address bit width.
Reviewed-by: Alistair Francis <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/cpu.c | 1 +
target/microblaze/mmu.c | 1 +
target/microblaze/mmu.h | 1 +
3 files changed, 3 insertions(+)
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 2b3f8fa374..d0649fdaaa 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -128,6 +128,7 @@ static void mb_cpu_reset(CPUState *s)
env->mmu.c_mmu = 3;
env->mmu.c_mmu_tlb_access = 3;
env->mmu.c_mmu_zones = 16;
+ env->mmu.c_addr_mask = MAKE_64BIT_MASK(0, cpu->cfg.addr_size);
#endif
}
diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c
index a379968618..166c79908c 100644
--- a/target/microblaze/mmu.c
+++ b/target/microblaze/mmu.c
@@ -164,6 +164,7 @@ unsigned int mmu_translate(struct microblaze_mmu *mmu,
tlb_rpn = d & TLB_RPN_MASK;
lu->vaddr = tlb_tag;
+ lu->paddr = tlb_rpn & mmu->c_addr_mask;
lu->paddr = tlb_rpn;
lu->size = tlb_size;
lu->err = ERR_HIT;
diff --git a/target/microblaze/mmu.h b/target/microblaze/mmu.h
index 1714caf82e..9fbdf38f36 100644
--- a/target/microblaze/mmu.h
+++ b/target/microblaze/mmu.h
@@ -72,6 +72,7 @@ struct microblaze_mmu
int c_mmu;
int c_mmu_tlb_access;
int c_mmu_zones;
+ uint64_t c_addr_mask; /* Mask to apply to physical addresses. */
};
struct microblaze_mmu_lookup
--
2.14.1
- [Qemu-devel] [PATCH v2 21/36] target-microblaze: Setup for 64bit addressing, (continued)
- [Qemu-devel] [PATCH v2 21/36] target-microblaze: Setup for 64bit addressing, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 23/36] target-microblaze: Implement MFSE EAR, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 20/36] target-microblaze: Make special registers 64-bit, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 25/36] target-microblaze: mmu: Remove unused register state, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 26/36] target-microblaze: mmu: Prepare for 64-bit addresses, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 24/36] target-microblaze: mmu: Add R_TBLX_MISS macros, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 27/36] target-microblaze: mmu: Add a configurable output address mask,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v2 29/36] target-microblaze: Allow address sizes between 32 and 64 bits, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 28/36] target-microblaze: Add support for extended access to TLBLO, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 30/36] target-microblaze: Simplify address computation using tcg_gen_addi_i32(), Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 33/36] target-microblaze: Remove argument b in eval_cc(), Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 32/36] target-microblaze: Use table based condition-codes conversion, Edgar E. Iglesias, 2018/05/08