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[Qemu-devel] [PATCH v2 03/36] target-microblaze: compute_ldst_addr: Use
From: |
Edgar E. Iglesias |
Subject: |
[Qemu-devel] [PATCH v2 03/36] target-microblaze: compute_ldst_addr: Use bool instead of int |
Date: |
Tue, 8 May 2018 19:31:19 +0200 |
From: "Edgar E. Iglesias" <address@hidden>
Use bool instead of int to represent flags.
No functional change.
Reviewed-by: Alistair Francis <address@hidden>
Reviewed-by: Richard Henderson <address@hidden>
Signed-off-by: Edgar E. Iglesias <address@hidden>
---
target/microblaze/translate.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c
index 6fe679ca6d..9232b42a8a 100644
--- a/target/microblaze/translate.c
+++ b/target/microblaze/translate.c
@@ -845,13 +845,13 @@ static void dec_imm(DisasContext *dc)
static inline TCGv *compute_ldst_addr(DisasContext *dc, TCGv *t)
{
- unsigned int extimm = dc->tb_flags & IMM_FLAG;
- /* Should be set to one if r1 is used by loadstores. */
- int stackprot = 0;
+ bool extimm = dc->tb_flags & IMM_FLAG;
+ /* Should be set to true if r1 is used by loadstores. */
+ bool stackprot = false;
/* All load/stores use ra. */
if (dc->ra == 1 && dc->cpu->cfg.stackprot) {
- stackprot = 1;
+ stackprot = true;
}
/* Treat the common cases first. */
@@ -864,7 +864,7 @@ static inline TCGv *compute_ldst_addr(DisasContext *dc,
TCGv *t)
}
if (dc->rb == 1 && dc->cpu->cfg.stackprot) {
- stackprot = 1;
+ stackprot = true;
}
*t = tcg_temp_new();
--
2.14.1
- [Qemu-devel] [PATCH v2 00/36] target-microblaze: Add support for Extended Addressing, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 01/36] target-microblaze: dec_load: Use bool instead of unsigned int, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 02/36] target-microblaze: dec_store: Use bool instead of unsigned int, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 03/36] target-microblaze: compute_ldst_addr: Use bool instead of int,
Edgar E. Iglesias <=
- [Qemu-devel] [PATCH v2 04/36] target-microblaze: Fallback to our latest CPU version, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 05/36] target-microblaze: Correct special register array sizes, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 06/36] target-microblaze: Correct the PVR array size, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 09/36] target-microblaze: Conditionalize setting of PVR11_USE_MMU, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 10/36] target-microblaze: Bypass MMU with MMU_NOMMU_IDX, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 08/36] target-microblaze: Remove USE_MMU PVR checks, Edgar E. Iglesias, 2018/05/08
- [Qemu-devel] [PATCH v2 11/36] target-microblaze: Make compute_ldst_addr always use a temp, Edgar E. Iglesias, 2018/05/08